LED, UART5, systick, printf works
- sysclk: 40 MHz (8MHz crystal+PLL) - 1ms systick - UART5 with IT - printf connected to UART5master
parent
1d891672ec
commit
60ba2a0b08
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file adc.h
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* @brief This file contains all the function prototypes for
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* the adc.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __ADC_H__
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#define __ADC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_ADC1_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ADC_H__ */
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file crc.h
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* @brief This file contains all the function prototypes for
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* the crc.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __CRC_H__
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#define __CRC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_CRC_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CRC_H__ */
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file dac.h
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* @brief This file contains all the function prototypes for
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* the dac.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __DAC_H__
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#define __DAC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_DAC1_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DAC_H__ */
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file gpio.h
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* @brief This file contains all the function prototypes for
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* the gpio.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __GPIO_H__
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#define __GPIO_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_GPIO_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /*__ GPIO_H__ */
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32_assert.h
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* @author MCD Application Team
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* @brief STM32 assert file.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32_ASSERT_H
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#define __STM32_ASSERT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* Includes ------------------------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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#ifdef USE_FULL_ASSERT
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/**
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* @brief The assert_param macro is used for function's parameters check.
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* @param expr If expr is false, it calls assert_failed function
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* which reports the name of the source file and the source
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* line number of the call that failed.
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* If expr is true, it returns no value.
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* @retval None
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*/
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#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
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/* Exported functions ------------------------------------------------------- */
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void assert_failed(uint8_t *file, uint32_t line);
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32_ASSERT_H */
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file usart.h
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* @brief This file contains all the function prototypes for
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* the usart.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __USART_H__
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#define __USART_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart3;
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_UART5_Init(void);
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void MX_USART2_UART_Init(void);
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void MX_USART3_UART_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __USART_H__ */
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file adc.c
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* @brief This file provides code for the configuration
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* of the ADC instances.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "adc.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* ADC1 init function */
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void MX_ADC1_Init(void)
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{
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/* USER CODE BEGIN ADC1_Init 0 */
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/* USER CODE END ADC1_Init 0 */
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LL_ADC_InitTypeDef ADC_InitStruct = {0};
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LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0};
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LL_ADC_CommonInitTypeDef ADC_CommonInitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* Peripheral clock enable */
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_ADC12);
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
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/**ADC1 GPIO Configuration
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PC2 ------> ADC1_IN8
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PC3 ------> ADC1_IN9
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*/
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GPIO_InitStruct.Pin = ADC_JACK1_Pin|ADC_JACK2_Pin;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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/* USER CODE BEGIN ADC1_Init 1 */
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/* USER CODE END ADC1_Init 1 */
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/** Common config
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*/
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ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B;
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ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
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ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE;
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LL_ADC_Init(ADC1, &ADC_InitStruct);
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ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
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ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_DISABLE;
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ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
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ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_SINGLE;
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ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_LIMITED;
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ADC_REG_InitStruct.Overrun = LL_ADC_REG_OVR_DATA_OVERWRITTEN;
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LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct);
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ADC_CommonInitStruct.CommonClock = LL_ADC_CLOCK_ASYNC_DIV1;
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ADC_CommonInitStruct.Multimode = LL_ADC_MULTI_INDEPENDENT;
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LL_ADC_CommonInit(__LL_ADC_COMMON_INSTANCE(ADC1), &ADC_CommonInitStruct);
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/* Enable ADC internal voltage regulator */
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LL_ADC_EnableInternalRegulator(ADC1);
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/* Delay for ADC internal voltage regulator stabilization. */
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/* Compute number of CPU cycles to wait for, from delay in us. */
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/* Note: Variable divided by 2 to compensate partially */
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/* CPU processing cycles (depends on compilation optimization). */
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/* Note: If system core clock frequency is below 200kHz, wait time */
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/* is only a few CPU processing cycles. */
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uint32_t wait_loop_index;
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wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);
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while(wait_loop_index != 0)
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{
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wait_loop_index--;
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}
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/** Configure Regular Channel
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*/
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LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_8);
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LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_8, LL_ADC_SAMPLINGTIME_1CYCLE_5);
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LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_8, LL_ADC_SINGLE_ENDED);
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/* USER CODE BEGIN ADC1_Init 2 */
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/* USER CODE END ADC1_Init 2 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file crc.c
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* @brief This file provides code for the configuration
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||||||
|
* of the CRC instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "crc.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/* CRC init function */
|
||||||
|
void MX_CRC_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN CRC_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END CRC_Init 0 */
|
||||||
|
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN CRC_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END CRC_Init 1 */
|
||||||
|
LL_CRC_SetInputDataReverseMode(CRC, LL_CRC_INDATA_REVERSE_NONE);
|
||||||
|
LL_CRC_SetOutputDataReverseMode(CRC, LL_CRC_OUTDATA_REVERSE_NONE);
|
||||||
|
LL_CRC_SetPolynomialCoef(CRC, LL_CRC_DEFAULT_CRC32_POLY);
|
||||||
|
LL_CRC_SetPolynomialSize(CRC, LL_CRC_POLYLENGTH_32B);
|
||||||
|
LL_CRC_SetInitialData(CRC, LL_CRC_DEFAULT_CRC_INITVALUE);
|
||||||
|
/* USER CODE BEGIN CRC_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END CRC_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
@ -0,0 +1,70 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file dac.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of the DAC instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "dac.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/* DAC1 init function */
|
||||||
|
void MX_DAC1_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN DAC1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DAC1_Init 0 */
|
||||||
|
|
||||||
|
LL_DAC_InitTypeDef DAC_InitStruct = {0};
|
||||||
|
|
||||||
|
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC1);
|
||||||
|
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
|
||||||
|
/**DAC1 GPIO Configuration
|
||||||
|
PA4 ------> DAC1_OUT1
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = DISP_BRIGHT_Pin;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
LL_GPIO_Init(DISP_BRIGHT_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN DAC1_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DAC1_Init 1 */
|
||||||
|
|
||||||
|
/** DAC channel OUT1 config
|
||||||
|
*/
|
||||||
|
DAC_InitStruct.TriggerSource = LL_DAC_TRIG_SOFTWARE;
|
||||||
|
DAC_InitStruct.WaveAutoGeneration = LL_DAC_WAVE_AUTO_GENERATION_NONE;
|
||||||
|
DAC_InitStruct.OutputBuffer = LL_DAC_OUTPUT_BUFFER_ENABLE;
|
||||||
|
LL_DAC_Init(DAC1, LL_DAC_CHANNEL_1, &DAC_InitStruct);
|
||||||
|
LL_DAC_DisableTrigger(DAC1, LL_DAC_CHANNEL_1);
|
||||||
|
/* USER CODE BEGIN DAC1_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END DAC1_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
@ -0,0 +1,152 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file gpio.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of all used GPIO pins.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "gpio.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
/* Configure GPIO */
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
/** Configure pins as
|
||||||
|
* Analog
|
||||||
|
* Input
|
||||||
|
* Output
|
||||||
|
* EVENT_OUT
|
||||||
|
* EXTI
|
||||||
|
PA10 ------> I2S2_ext_SD
|
||||||
|
PA15 ------> I2S3_WS
|
||||||
|
PB4 ------> I2S3_ext_SD
|
||||||
|
PB5 ------> I2S3_SD
|
||||||
|
PB6 ------> I2C1_SCL
|
||||||
|
*/
|
||||||
|
void MX_GPIO_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
|
||||||
|
/* GPIO Ports Clock Enable */
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOD);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
LL_GPIO_ResetOutputPin(GPIOC, SHR_CLK_Pin|SHR_STR_Pin);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
LL_GPIO_ResetOutputPin(GPIOA, HWRESET_Pin|LL_GPIO_PIN_5);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
LL_GPIO_ResetOutputPin(SHR_DOUT_DISP_GPIO_Port, SHR_DOUT_DISP_Pin);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = KBDA2_RIGHT_Pin|KBDA1_LEFT_Pin|KBDA1_RIGHT_Pin|KBDA1_UP_Pin
|
||||||
|
|KBDA1_DOWN_Pin|KBDA2_LEFT_Pin|KBDB2_UP_Pin;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = SHR_CLK_Pin|SHR_STR_Pin;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = HWRESET_Pin|LL_GPIO_PIN_5;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = KBDA2_DOWN_Pin|KBDB1_LEFT_Pin|KBDB2_DOWN_Pin|KBDB1_RIGHT_Pin
|
||||||
|
|KBDB2_RIGHT_Pin;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = KBDB1_UP_Pin|KBDB1_DOWN_Pin|KBDB2_LEFT_Pin|SHR_DIN_KBD_Pin;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = I2S2_SDIN_Pin;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
|
||||||
|
LL_GPIO_Init(I2S2_SDIN_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
|
||||||
|
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_4|LL_GPIO_PIN_5;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
|
||||||
|
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_6;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
|
||||||
|
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/**/
|
||||||
|
GPIO_InitStruct.Pin = SHR_DOUT_DISP_Pin;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
LL_GPIO_Init(SHR_DOUT_DISP_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 2 */
|
||||||
|
|
||||||
|
/* USER CODE END 2 */
|
||||||
@ -0,0 +1,260 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file usart.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of the USART instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "usart.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
UART_HandleTypeDef huart2;
|
||||||
|
UART_HandleTypeDef huart3;
|
||||||
|
|
||||||
|
/* UART5 init function */
|
||||||
|
void MX_UART5_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN UART5_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_Init 0 */
|
||||||
|
|
||||||
|
LL_USART_InitTypeDef UART_InitStruct = {0};
|
||||||
|
|
||||||
|
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UART5);
|
||||||
|
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
|
||||||
|
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOD);
|
||||||
|
/**UART5 GPIO Configuration
|
||||||
|
PC12 ------> UART5_TX
|
||||||
|
PD2 ------> UART5_RX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
|
||||||
|
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
|
||||||
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||||
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
|
||||||
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
||||||
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
|
||||||
|
LL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* UART5 interrupt Init */
|
||||||
|
NVIC_SetPriority(UART5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
|
||||||
|
NVIC_EnableIRQ(UART5_IRQn);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN UART5_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_Init 1 */
|
||||||
|
UART_InitStruct.BaudRate = 115200;
|
||||||
|
UART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
|
||||||
|
UART_InitStruct.StopBits = LL_USART_STOPBITS_1;
|
||||||
|
UART_InitStruct.Parity = LL_USART_PARITY_NONE;
|
||||||
|
UART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
|
||||||
|
UART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
|
||||||
|
UART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
|
||||||
|
LL_USART_Init(UART5, &UART_InitStruct);
|
||||||
|
LL_USART_ConfigAsyncMode(UART5);
|
||||||
|
LL_USART_Enable(UART5);
|
||||||
|
/* USER CODE BEGIN UART5_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
/* USART2 init function */
|
||||||
|
|
||||||
|
void MX_USART2_UART_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART2_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_Init 1 */
|
||||||
|
huart2.Instance = USART2;
|
||||||
|
huart2.Init.BaudRate = 38400;
|
||||||
|
huart2.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
|
huart2.Init.StopBits = UART_STOPBITS_1;
|
||||||
|
huart2.Init.Parity = UART_PARITY_NONE;
|
||||||
|
huart2.Init.Mode = UART_MODE_TX_RX;
|
||||||
|
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 0, 0) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN USART2_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
/* USART3 init function */
|
||||||
|
|
||||||
|
void MX_USART3_UART_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART3_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART3_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_Init 1 */
|
||||||
|
huart3.Instance = USART3;
|
||||||
|
huart3.Init.BaudRate = 115200;
|
||||||
|
huart3.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
|
huart3.Init.StopBits = UART_STOPBITS_1;
|
||||||
|
huart3.Init.Parity = UART_PARITY_NONE;
|
||||||
|
huart3.Init.Mode = UART_MODE_TX_RX;
|
||||||
|
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_RS485Ex_Init(&huart3, UART_DE_POLARITY_HIGH, 0, 0) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN USART3_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
if(uartHandle->Instance==USART2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART2_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspInit 0 */
|
||||||
|
/* USART2 clock enable */
|
||||||
|
__HAL_RCC_USART2_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
/**USART2 GPIO Configuration
|
||||||
|
PA1 ------> USART2_DE
|
||||||
|
PA2 ------> USART2_TX
|
||||||
|
PA3 ------> USART2_RX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_3;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART2_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(uartHandle->Instance==USART3)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART3_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_MspInit 0 */
|
||||||
|
/* USART3 clock enable */
|
||||||
|
__HAL_RCC_USART3_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
/**USART3 GPIO Configuration
|
||||||
|
PB10 ------> USART3_TX
|
||||||
|
PB11 ------> USART3_RX
|
||||||
|
PB14 ------> USART3_DE
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_14;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART3_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_MspInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(uartHandle->Instance==USART2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART2_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_USART2_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**USART2 GPIO Configuration
|
||||||
|
PA1 ------> USART2_DE
|
||||||
|
PA2 ------> USART2_TX
|
||||||
|
PA3 ------> USART2_RX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART2_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(uartHandle->Instance==USART3)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART3_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_USART3_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**USART3 GPIO Configuration
|
||||||
|
PB10 ------> USART3_TX
|
||||||
|
PB11 ------> USART3_RX
|
||||||
|
PB14 ------> USART3_DE
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_14);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART3_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
@ -0,0 +1,14 @@
|
|||||||
|
#ifndef __UART5_IT_H__
|
||||||
|
#define __UART5_IT_H__
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
extern void Uart5_Init(void);
|
||||||
|
extern void Uart5_PutByte(uint8_t d);
|
||||||
|
extern void Uart5_PutData(void* src, uint16_t n);
|
||||||
|
extern int16_t Uart5_GetByte(void);
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,11 @@
|
|||||||
|
#ifndef __UART5_IT_CFG_H__
|
||||||
|
#define __UART5_IT_CFG_H__
|
||||||
|
|
||||||
|
#include "stm32f3xx_ll_usart.h"
|
||||||
|
|
||||||
|
#define UART5_RXBUF_SIZE 1024
|
||||||
|
#define UART5_TXBUF_SIZE 1024
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
||||||
@ -1,13 +0,0 @@
|
|||||||
#ifndef __USART2_IT_H__
|
|
||||||
#define __USART2_IT_H__
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
|
|
||||||
extern void Usart2_Init(void);
|
|
||||||
extern void Usart2_PutByte(uint8_t d);
|
|
||||||
extern void Usart2_PutData(void* src, uint16_t n);
|
|
||||||
extern int16_t Usart2_GetByte(void);
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -1,342 +0,0 @@
|
|||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file stm32f3xx_hal_tim_ex.h
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @brief Header file of TIM HAL Extended module.
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2016 STMicroelectronics.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
|
||||||
* in the root directory of this software component.
|
|
||||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
|
||||||
#ifndef STM32F3xx_HAL_TIM_EX_H
|
|
||||||
#define STM32F3xx_HAL_TIM_EX_H
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
|
||||||
#include "stm32f3xx_hal_def.h"
|
|
||||||
|
|
||||||
/** @addtogroup STM32F3xx_HAL_Driver
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported types ------------------------------------------------------------*/
|
|
||||||
/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief TIM Hall sensor Configuration Structure definition
|
|
||||||
*/
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
|
|
||||||
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
|
|
||||||
|
|
||||||
uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
|
|
||||||
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
|
|
||||||
|
|
||||||
uint32_t IC1Filter; /*!< Specifies the input capture filter.
|
|
||||||
This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
|
|
||||||
|
|
||||||
uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
|
|
||||||
This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
|
|
||||||
} TIM_HallSensor_InitTypeDef;
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/* End of exported types -----------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Exported constants --------------------------------------------------------*/
|
|
||||||
/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup TIMEx_Remap TIM Extended Remapping
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#if defined(TIM1)
|
|
||||||
#define TIM_TIM1_ADC1_NONE (0x00000000U) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
|
|
||||||
#define TIM_TIM1_ADC1_AWD1 (0x00000001U) /*!< TIM1_ETR is connected to ADC1 AWD1 */
|
|
||||||
#define TIM_TIM1_ADC1_AWD2 (0x00000002U) /*!< TIM1_ETR is connected to ADC1 AWD2 */
|
|
||||||
#define TIM_TIM1_ADC1_AWD3 (0x00000003U) /*!< TIM1_ETR is connected to ADC1 AWD3 */
|
|
||||||
|
|
||||||
#if defined(ADC4)
|
|
||||||
#define TIM_TIM1_ADC4_NONE (0x00000000U) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
|
|
||||||
#define TIM_TIM1_ADC4_AWD1 (0x00000004U) /*!< TIM1_ETR is connected to ADC4 AWD1 */
|
|
||||||
#define TIM_TIM1_ADC4_AWD2 (0x00000008U) /*!< TIM1_ETR is connected to ADC4 AWD2 */
|
|
||||||
#define TIM_TIM1_ADC4_AWD3 (0x0000000CU) /*!< TIM1_ETR is connected to ADC4 AWD3 */
|
|
||||||
#elif defined(ADC2)
|
|
||||||
#define TIM_TIM1_ADC2_NONE (0x00000000U) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
|
|
||||||
#define TIM_TIM1_ADC2_AWD1 (0x00000004U) /*!< TIM1_ETR is connected to ADC2 AWD1 */
|
|
||||||
#define TIM_TIM1_ADC2_AWD2 (0x00000008U) /*!< TIM1_ETR is connected to ADC2 AWD2 */
|
|
||||||
#define TIM_TIM1_ADC2_AWD3 (0x0000000CU) /*!< TIM1_ETR is connected to ADC2 AWD3 */
|
|
||||||
#endif /* ADC4 */
|
|
||||||
#endif /* TIM1 */
|
|
||||||
|
|
||||||
#if defined(TIM8)
|
|
||||||
#define TIM_TIM8_ADC2_NONE (0x00000000U) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */
|
|
||||||
#define TIM_TIM8_ADC2_AWD1 (0x00000001U) /*!< TIM8_ETR is connected to ADC2 AWD1 */
|
|
||||||
#define TIM_TIM8_ADC2_AWD2 (0x00000002U) /*!< TIM8_ETR is connected to ADC2 AWD2 */
|
|
||||||
#define TIM_TIM8_ADC2_AWD3 (0x00000003U) /*!< TIM8_ETR is connected to ADC2 AWD3 */
|
|
||||||
|
|
||||||
#define TIM_TIM8_ADC3_NONE (0x00000000U) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */
|
|
||||||
#define TIM_TIM8_ADC3_AWD1 (0x00000004U) /*!< TIM8_ETR is connected to ADC3 AWD1 */
|
|
||||||
#define TIM_TIM8_ADC3_AWD2 (0x00000008U) /*!< TIM8_ETR is connected to ADC3 AWD2 */
|
|
||||||
#define TIM_TIM8_ADC3_AWD3 (0x0000000CU) /*!< TIM8_ETR is connected to ADC3 AWD3 */
|
|
||||||
#endif /* TIM8 */
|
|
||||||
|
|
||||||
#if defined(TIM14)
|
|
||||||
#define TIM_TIM14_GPIO (0x00000000U) /*!< TIM14 TI1 is connected to GPIO */
|
|
||||||
#define TIM_TIM14_RTC (0x00000001U) /*!< TIM14 TI1 is connected to RTC_clock */
|
|
||||||
#define TIM_TIM14_HSE (0x00000002U) /*!< TIM14 TI1 is connected to HSE/32U */
|
|
||||||
#define TIM_TIM14_MCO (0x00000003U) /*!< TIM14 TI1 is connected to MCO */
|
|
||||||
#endif /* TIM14 */
|
|
||||||
|
|
||||||
#if defined(TIM16)
|
|
||||||
#define TIM_TIM16_GPIO (0x00000000U) /*!< TIM16 TI1 is connected to GPIO */
|
|
||||||
#define TIM_TIM16_RTC (0x00000001U) /*!< TIM16 TI1 is connected to RTC_clock */
|
|
||||||
#define TIM_TIM16_HSE (0x00000002U) /*!< TIM16 TI1 is connected to HSE/32 */
|
|
||||||
#define TIM_TIM16_MCO (0x00000003U) /*!< TIM16 TI1 is connected to MCO */
|
|
||||||
#endif /* TIM16 */
|
|
||||||
|
|
||||||
#if defined(TIM20)
|
|
||||||
#define TIM_TIM20_ADC3_NONE (0x00000000U) /*!< TIM20_ETR is not connected to any AWD (analog watchdog) */
|
|
||||||
#define TIM_TIM20_ADC3_AWD1 (0x00000001U) /*!< TIM20_ETR is connected to ADC3 AWD1 */
|
|
||||||
#define TIM_TIM20_ADC3_AWD2 (0x00000002U) /*!< TIM20_ETR is connected to ADC3 AWD2 */
|
|
||||||
#define TIM_TIM20_ADC3_AWD3 (0x00000003U) /*!< TIM20_ETR is connected to ADC3 AWD3 */
|
|
||||||
|
|
||||||
#define TIM_TIM20_ADC4_NONE (0x00000000U) /*!< TIM20_ETR is not connected to any AWD (analog watchdog) */
|
|
||||||
#define TIM_TIM20_ADC4_AWD1 (0x00000004U) /*!< TIM20_ETR is connected to ADC4 AWD1 */
|
|
||||||
#define TIM_TIM20_ADC4_AWD2 (0x00000008U) /*!< TIM20_ETR is connected to ADC4 AWD2 */
|
|
||||||
#define TIM_TIM20_ADC4_AWD3 (0x0000000CU) /*!< TIM20_ETR is connected to ADC4 AWD3 */
|
|
||||||
#endif /* TIM20 */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/* End of exported constants -------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Exported macro ------------------------------------------------------------*/
|
|
||||||
/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/* End of exported macro -----------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Private macro -------------------------------------------------------------*/
|
|
||||||
/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#if defined(TIM1) && defined(TIM8) && defined(TIM20) && defined(TIM16)
|
|
||||||
#define IS_TIM_REMAP(__INSTANCE__, __REMAP__) \
|
|
||||||
((((__INSTANCE__) == TIM1) && ((((__REMAP__) & 0xFFFFFFF0U) == 0x00000000U))) \
|
|
||||||
|| (((__INSTANCE__) == TIM8) && ((((__REMAP__) & 0xFFFFFFF0U) == 0x00000000U))) \
|
|
||||||
|| (((__INSTANCE__) == TIM20) && ((((__REMAP__) & 0xFFFFFFF0U) == 0x00000000U))) \
|
|
||||||
|| (((__INSTANCE__) == TIM16) && ((((__REMAP__) & 0xFFFFFFFCU) == 0x00000000U))))
|
|
||||||
#elif defined(TIM1) && defined(TIM8) && defined(TIM16)
|
|
||||||
#define IS_TIM_REMAP(__INSTANCE__, __REMAP__) \
|
|
||||||
((((__INSTANCE__) == TIM1) && ((((__REMAP__) & 0xFFFFFFF0U) == 0x00000000U))) \
|
|
||||||
|| (((__INSTANCE__) == TIM8) && ((((__REMAP__) & 0xFFFFFFF0U) == 0x00000000U))) \
|
|
||||||
|| (((__INSTANCE__) == TIM16) && ((((__REMAP__) & 0xFFFFFFFCU) == 0x00000000U))))
|
|
||||||
#elif defined(TIM1) && defined(TIM16)
|
|
||||||
#define IS_TIM_REMAP(__INSTANCE__, __REMAP__) \
|
|
||||||
((((__INSTANCE__) == TIM1) && ((((__REMAP__) & 0xFFFFFFF0U) == 0x00000000U))) \
|
|
||||||
|| (((__INSTANCE__) == TIM16) && ((((__REMAP__) & 0xFFFFFFFCU) == 0x00000000U))))
|
|
||||||
#elif defined(TIM14)
|
|
||||||
#define IS_TIM_REMAP(__INSTANCE__, __REMAP__) \
|
|
||||||
(((__INSTANCE__) == TIM14) && (((__REMAP__) & 0xFFFFFFFCU) == 0x00000000U))
|
|
||||||
#endif /* TIM1 && TIM8 && TIM20 && TIM16 */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/* End of private macro ------------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
|
|
||||||
* @brief Timer Hall Sensor functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Timer Hall Sensor functions **********************************************/
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
|
|
||||||
|
|
||||||
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
|
|
||||||
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
|
|
||||||
|
|
||||||
/* Blocking mode: Polling */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
|
|
||||||
/* Non-Blocking mode: Interrupt */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
|
|
||||||
/* Non-Blocking mode: DMA */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
|
|
||||||
* @brief Timer Complementary Output Compare functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Timer Complementary Output Compare functions *****************************/
|
|
||||||
/* Blocking mode: Polling */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
|
|
||||||
/* Non-Blocking mode: Interrupt */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
|
|
||||||
/* Non-Blocking mode: DMA */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
|
|
||||||
uint16_t Length);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
|
|
||||||
* @brief Timer Complementary PWM functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Timer Complementary PWM functions ****************************************/
|
|
||||||
/* Blocking mode: Polling */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
|
|
||||||
/* Non-Blocking mode: Interrupt */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
/* Non-Blocking mode: DMA */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
|
|
||||||
uint16_t Length);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
|
|
||||||
* @brief Timer Complementary One Pulse functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Timer Complementary One Pulse functions **********************************/
|
|
||||||
/* Blocking mode: Polling */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
|
|
||||||
|
|
||||||
/* Non-Blocking mode: Interrupt */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
|
|
||||||
* @brief Peripheral Control functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Extended Control functions ************************************************/
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
|
|
||||||
uint32_t CommutationSource);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
|
|
||||||
uint32_t CommutationSource);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
|
|
||||||
uint32_t CommutationSource);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
|
|
||||||
const TIM_MasterConfigTypeDef *sMasterConfig);
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
|
|
||||||
const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
|
|
||||||
#if defined(TIM_CCR5_CCR5)
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
|
|
||||||
#endif /* TIM_CCR5_CCR5 */
|
|
||||||
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
|
|
||||||
* @brief Extended Callbacks functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Extended Callback **********************************************************/
|
|
||||||
void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
|
|
||||||
void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
|
|
||||||
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
|
|
||||||
#if defined(TIM_BDTR_BK2E)
|
|
||||||
void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
|
|
||||||
#endif /* TIM_BDTR_BK2E */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
|
|
||||||
* @brief Extended Peripheral State functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Extended Peripheral State functions ***************************************/
|
|
||||||
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim);
|
|
||||||
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/* End of exported functions -------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Private functions----------------------------------------------------------*/
|
|
||||||
/** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
|
|
||||||
void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/* End of private functions --------------------------------------------------*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* STM32F3xx_HAL_TIM_EX_H */
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,461 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_crc.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of CRC LL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32F3xx_LL_CRC_H
|
||||||
|
#define STM32F3xx_LL_CRC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(CRC)
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL CRC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/** @defgroup CRC_LL_Exported_Constants CRC Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EC_POLYLENGTH Polynomial length
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_CRC_POLYLENGTH_32B 0x00000000U /*!< 32 bits Polynomial size */
|
||||||
|
#define LL_CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< 16 bits Polynomial size */
|
||||||
|
#define LL_CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< 8 bits Polynomial size */
|
||||||
|
#define LL_CRC_POLYLENGTH_7B (CRC_CR_POLYSIZE_1 | CRC_CR_POLYSIZE_0) /*!< 7 bits Polynomial size */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EC_INDATA_REVERSE Input Data Reverse
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_CRC_INDATA_REVERSE_NONE 0x00000000U /*!< Input Data bit order not affected */
|
||||||
|
#define LL_CRC_INDATA_REVERSE_BYTE CRC_CR_REV_IN_0 /*!< Input Data bit reversal done by byte */
|
||||||
|
#define LL_CRC_INDATA_REVERSE_HALFWORD CRC_CR_REV_IN_1 /*!< Input Data bit reversal done by half-word */
|
||||||
|
#define LL_CRC_INDATA_REVERSE_WORD (CRC_CR_REV_IN_1 | CRC_CR_REV_IN_0) /*!< Input Data bit reversal done by word */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EC_OUTDATA_REVERSE Output Data Reverse
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_CRC_OUTDATA_REVERSE_NONE 0x00000000U /*!< Output Data bit order not affected */
|
||||||
|
#define LL_CRC_OUTDATA_REVERSE_BIT CRC_CR_REV_OUT /*!< Output Data bit reversal done by bit */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EC_Default_Polynomial_Value Default CRC generating polynomial value
|
||||||
|
* @brief Normal representation of this polynomial value is
|
||||||
|
* X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2 + X + 1 .
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_CRC_DEFAULT_CRC32_POLY 0x04C11DB7U /*!< Default CRC generating polynomial value */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EC_Default_InitValue Default CRC computation initialization value
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_CRC_DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Default CRC computation initialization value */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/** @defgroup CRC_LL_Exported_Macros CRC Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write a value in CRC register
|
||||||
|
* @param __INSTANCE__ CRC Instance
|
||||||
|
* @param __REG__ Register to be written
|
||||||
|
* @param __VALUE__ Value to be written in the register
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read a value in CRC register
|
||||||
|
* @param __INSTANCE__ CRC Instance
|
||||||
|
* @param __REG__ Register to be read
|
||||||
|
* @retval Register value
|
||||||
|
*/
|
||||||
|
#define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @defgroup CRC_LL_Exported_Functions CRC Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EF_Configuration CRC Configuration functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reset the CRC calculation unit.
|
||||||
|
* @note If Programmable Initial CRC value feature
|
||||||
|
* is available, also set the Data Register to the value stored in the
|
||||||
|
* CRC_INIT register, otherwise, reset Data Register to its default value.
|
||||||
|
* @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
SET_BIT(CRCx->CR, CRC_CR_RESET);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configure size of the polynomial.
|
||||||
|
* @rmtoll CR POLYSIZE LL_CRC_SetPolynomialSize
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param PolySize This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_32B
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_16B
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_8B
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_7B
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySize)
|
||||||
|
{
|
||||||
|
MODIFY_REG(CRCx->CR, CRC_CR_POLYSIZE, PolySize);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return size of the polynomial.
|
||||||
|
* @rmtoll CR POLYSIZE LL_CRC_GetPolynomialSize
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Returned value can be one of the following values:
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_32B
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_16B
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_8B
|
||||||
|
* @arg @ref LL_CRC_POLYLENGTH_7B
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configure the reversal of the bit order of the input data
|
||||||
|
* @rmtoll CR REV_IN LL_CRC_SetInputDataReverseMode
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param ReverseMode This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_NONE
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_WORD
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
|
||||||
|
{
|
||||||
|
MODIFY_REG(CRCx->CR, CRC_CR_REV_IN, ReverseMode);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return type of reversal for input data bit order
|
||||||
|
* @rmtoll CR REV_IN LL_CRC_GetInputDataReverseMode
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Returned value can be one of the following values:
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_NONE
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
|
||||||
|
* @arg @ref LL_CRC_INDATA_REVERSE_WORD
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configure the reversal of the bit order of the Output data
|
||||||
|
* @rmtoll CR REV_OUT LL_CRC_SetOutputDataReverseMode
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param ReverseMode This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
|
||||||
|
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
|
||||||
|
{
|
||||||
|
MODIFY_REG(CRCx->CR, CRC_CR_REV_OUT, ReverseMode);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return type of reversal of the bit order of the Output data
|
||||||
|
* @rmtoll CR REV_OUT LL_CRC_GetOutputDataReverseMode
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Returned value can be one of the following values:
|
||||||
|
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
|
||||||
|
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the Programmable initial CRC value.
|
||||||
|
* @note If the CRC size is less than 32 bits, the least significant bits
|
||||||
|
* are used to write the correct value
|
||||||
|
* @note LL_CRC_DEFAULT_CRC_INITVALUE could be used as value for InitCrc parameter.
|
||||||
|
* @rmtoll INIT INIT LL_CRC_SetInitialData
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param InitCrc Value to be programmed in Programmable initial CRC value register
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc)
|
||||||
|
{
|
||||||
|
WRITE_REG(CRCx->INIT, InitCrc);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current Initial CRC value.
|
||||||
|
* @note If the CRC size is less than 32 bits, the least significant bits
|
||||||
|
* are used to read the correct value
|
||||||
|
* @rmtoll INIT INIT LL_CRC_GetInitialData
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Value programmed in Programmable initial CRC value register
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_CRC_GetInitialData(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint32_t)(READ_REG(CRCx->INIT));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the Programmable polynomial value
|
||||||
|
* (coefficients of the polynomial to be used for CRC calculation).
|
||||||
|
* @note LL_CRC_DEFAULT_CRC32_POLY could be used as value for PolynomCoef parameter.
|
||||||
|
* @note Please check Reference Manual and existing Errata Sheets,
|
||||||
|
* regarding possible limitations for Polynomial values usage.
|
||||||
|
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
|
||||||
|
* @rmtoll POL POL LL_CRC_SetPolynomialCoef
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param PolynomCoef Value to be programmed in Programmable Polynomial value register
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t PolynomCoef)
|
||||||
|
{
|
||||||
|
WRITE_REG(CRCx->POL, PolynomCoef);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current Programmable polynomial value
|
||||||
|
* @note Please check Reference Manual and existing Errata Sheets,
|
||||||
|
* regarding possible limitations for Polynomial values usage.
|
||||||
|
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
|
||||||
|
* @rmtoll POL POL LL_CRC_GetPolynomialCoef
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Value programmed in Programmable Polynomial value register
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint32_t)(READ_REG(CRCx->POL));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_LL_EF_Data_Management Data_Management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write given 32-bit data to the CRC calculator
|
||||||
|
* @rmtoll DR DR LL_CRC_FeedData32
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData)
|
||||||
|
{
|
||||||
|
WRITE_REG(CRCx->DR, InData);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write given 16-bit data to the CRC calculator
|
||||||
|
* @rmtoll DR DR LL_CRC_FeedData16
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param InData 16 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_FeedData16(CRC_TypeDef *CRCx, uint16_t InData)
|
||||||
|
{
|
||||||
|
__IO uint16_t *pReg;
|
||||||
|
|
||||||
|
pReg = (__IO uint16_t *)(__IO void *)(&CRCx->DR); /* Derogation MisraC2012 R.11.5 */
|
||||||
|
*pReg = InData;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write given 8-bit data to the CRC calculator
|
||||||
|
* @rmtoll DR DR LL_CRC_FeedData8
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param InData 8 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData)
|
||||||
|
{
|
||||||
|
*(uint8_t __IO *)(&CRCx->DR) = (uint8_t) InData;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current CRC calculation result. 32 bits value is returned.
|
||||||
|
* @rmtoll DR DR LL_CRC_ReadData32
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint32_t)(READ_REG(CRCx->DR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current CRC calculation result. 16 bits value is returned.
|
||||||
|
* @note This function is expected to be used in a 16 bits CRC polynomial size context.
|
||||||
|
* @rmtoll DR DR LL_CRC_ReadData16
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Current CRC calculation result as stored in CRC_DR register (16 bits).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint16_t LL_CRC_ReadData16(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint16_t)READ_REG(CRCx->DR);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current CRC calculation result. 8 bits value is returned.
|
||||||
|
* @note This function is expected to be used in a 8 bits CRC polynomial size context.
|
||||||
|
* @rmtoll DR DR LL_CRC_ReadData8
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Current CRC calculation result as stored in CRC_DR register (8 bits).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint8_t LL_CRC_ReadData8(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint8_t)READ_REG(CRCx->DR);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current CRC calculation result. 7 bits value is returned.
|
||||||
|
* @note This function is expected to be used in a 7 bits CRC polynomial size context.
|
||||||
|
* @rmtoll DR DR LL_CRC_ReadData7
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Current CRC calculation result as stored in CRC_DR register (7 bits).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint8_t LL_CRC_ReadData7(const CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return data stored in the Independent Data(IDR) register.
|
||||||
|
* @note This register can be used as a temporary storage location for one byte.
|
||||||
|
* @rmtoll IDR IDR LL_CRC_Read_IDR
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval Value stored in CRC_IDR register (General-purpose 8-bit data register).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
return (uint32_t)(READ_REG(CRCx->IDR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Store data in the Independent Data(IDR) register.
|
||||||
|
* @note This register can be used as a temporary storage location for one byte.
|
||||||
|
* @rmtoll IDR IDR LL_CRC_Write_IDR
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @param InData value to be stored in CRC_IDR register (8-bit) between Min_Data=0 and Max_Data=0xFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData)
|
||||||
|
{
|
||||||
|
*((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData;
|
||||||
|
}
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(USE_FULL_LL_DRIVER)
|
||||||
|
/** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
#endif /* USE_FULL_LL_DRIVER */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* defined(CRC) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32F3xx_LL_CRC_H */
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,116 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_crc.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CRC LL module driver.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#if defined(USE_FULL_LL_DRIVER)
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx_ll_crc.h"
|
||||||
|
#include "stm32f3xx_ll_bus.h"
|
||||||
|
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
#include "stm32_assert.h"
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (CRC)
|
||||||
|
|
||||||
|
/** @addtogroup CRC_LL
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup CRC_LL_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CRC_LL_EF_Init
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief De-initialize CRC registers (Registers restored to their default values).
|
||||||
|
* @param CRCx CRC Instance
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: CRC registers are de-initialized
|
||||||
|
* - ERROR: CRC registers are not de-initialized
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CRC_ALL_INSTANCE(CRCx));
|
||||||
|
|
||||||
|
if (CRCx == CRC)
|
||||||
|
{
|
||||||
|
/* Set programmable polynomial size in CR register to reset value (32 bits)*/
|
||||||
|
LL_CRC_SetPolynomialSize(CRCx, LL_CRC_POLYLENGTH_32B);
|
||||||
|
|
||||||
|
/* Set programmable polynomial in POL register to reset value */
|
||||||
|
LL_CRC_SetPolynomialCoef(CRCx, LL_CRC_DEFAULT_CRC32_POLY);
|
||||||
|
|
||||||
|
/* Set INIT register to reset value */
|
||||||
|
LL_CRC_SetInitialData(CRCx, LL_CRC_DEFAULT_CRC_INITVALUE);
|
||||||
|
|
||||||
|
/* Set Reversibility options on I/O data values in CR register to reset value */
|
||||||
|
LL_CRC_SetInputDataReverseMode(CRCx, LL_CRC_INDATA_REVERSE_NONE);
|
||||||
|
LL_CRC_SetOutputDataReverseMode(CRCx, LL_CRC_OUTDATA_REVERSE_NONE);
|
||||||
|
|
||||||
|
/* Reset the CRC calculation unit */
|
||||||
|
LL_CRC_ResetCRCCalculationUnit(CRCx);
|
||||||
|
|
||||||
|
/* Reset IDR register */
|
||||||
|
LL_CRC_Write_IDR(CRCx, 0x00U);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (status);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* defined (CRC) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* USE_FULL_LL_DRIVER */
|
||||||
@ -0,0 +1,335 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_dac.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief DAC LL module driver
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(USE_FULL_LL_DRIVER)
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx_ll_dac.h"
|
||||||
|
#include "stm32f3xx_ll_bus.h"
|
||||||
|
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
#include "stm32_assert.h"
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (DAC1) || defined (DAC2)
|
||||||
|
|
||||||
|
/** @addtogroup DAC_LL DAC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @addtogroup DAC_LL_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||||
|
#define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__) \
|
||||||
|
( \
|
||||||
|
((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
|
||||||
|
|| ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2) \
|
||||||
|
)
|
||||||
|
#else
|
||||||
|
#define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__) \
|
||||||
|
( \
|
||||||
|
((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
|
||||||
|
)
|
||||||
|
#endif /* DAC_CHANNEL2_SUPPORT */
|
||||||
|
|
||||||
|
#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
|
||||||
|
#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__) \
|
||||||
|
( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#elif defined(STM32F303x8) || defined(STM32F328xx)
|
||||||
|
#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__) \
|
||||||
|
( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#elif defined(STM32F302xE) || defined(STM32F302xC) || defined(STM32F302x8)
|
||||||
|
#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__) \
|
||||||
|
( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#elif defined(STM32F301x8) || defined(STM32F318xx)
|
||||||
|
#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__) \
|
||||||
|
( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#elif defined(STM32F373xC) || defined(STM32F378xx)
|
||||||
|
#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__) \
|
||||||
|
( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM5_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#elif defined(STM32F334x8)
|
||||||
|
#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__) \
|
||||||
|
( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIGGER_HRTIM1_DACTRG2) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIGGER_HRTIM1_DACTRG3) \
|
||||||
|
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
|
||||||
|
)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define IS_LL_DAC_WAVE_AUTO_GENER_MODE(__WAVE_AUTO_GENERATION_MODE__) \
|
||||||
|
( ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NONE) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(__WAVE_AUTO_GENERATION_CONFIG__) \
|
||||||
|
( ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BIT0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS1_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS2_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS3_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS4_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS5_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS6_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS7_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS8_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS9_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS10_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS11_0) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_3) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_7) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_15) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_31) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_63) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_127) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_255) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_511) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1023) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_2047) \
|
||||||
|
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_4095) \
|
||||||
|
)
|
||||||
|
|
||||||
|
#define IS_LL_DAC_OUTPUT_BUFFER(__OUTPUT_BUFFER__) \
|
||||||
|
( ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_ENABLE) \
|
||||||
|
|| ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_DISABLE) \
|
||||||
|
)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup DAC_LL_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup DAC_LL_EF_Init
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief De-initialize registers of the selected DAC instance
|
||||||
|
* to their default reset values.
|
||||||
|
* @param DACx DAC instance
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: DAC registers are de-initialized
|
||||||
|
* - ERROR: not applicable
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_DAC_ALL_INSTANCE(DACx));
|
||||||
|
|
||||||
|
if(DACx == DAC1)
|
||||||
|
{
|
||||||
|
/* Force reset of DAC clock */
|
||||||
|
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_DAC1);
|
||||||
|
|
||||||
|
/* Release reset of DAC clock */
|
||||||
|
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_DAC1);
|
||||||
|
}
|
||||||
|
#if defined(DAC2)
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Force reset of DAC clock */
|
||||||
|
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_DAC2);
|
||||||
|
|
||||||
|
/* Release reset of DAC clock */
|
||||||
|
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_DAC2);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
return SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize some features of DAC instance.
|
||||||
|
* @note The setting of these parameters by function @ref LL_DAC_Init()
|
||||||
|
* is conditioned to DAC state:
|
||||||
|
* DAC instance must be disabled.
|
||||||
|
* @param DACx DAC instance
|
||||||
|
* @param DAC_Channel This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_DAC_CHANNEL_1
|
||||||
|
* @arg @ref LL_DAC_CHANNEL_2 (1)
|
||||||
|
*
|
||||||
|
* (1) On this STM32 series, parameter not available on all devices.
|
||||||
|
* Refer to device datasheet for channels availability.
|
||||||
|
* @param DAC_InitStruct Pointer to a @ref LL_DAC_InitTypeDef structure
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: DAC registers are initialized
|
||||||
|
* - ERROR: DAC registers are not initialized
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_DAC_ALL_INSTANCE(DACx));
|
||||||
|
assert_param(IS_LL_DAC_CHANNEL(DACx, DAC_Channel));
|
||||||
|
assert_param(IS_LL_DAC_TRIGGER_SOURCE(DAC_InitStruct->TriggerSource));
|
||||||
|
assert_param(IS_LL_DAC_OUTPUT_BUFFER(DAC_InitStruct->OutputBuffer));
|
||||||
|
assert_param(IS_LL_DAC_WAVE_AUTO_GENER_MODE(DAC_InitStruct->WaveAutoGeneration));
|
||||||
|
if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
|
||||||
|
{
|
||||||
|
assert_param(IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(DAC_InitStruct->WaveAutoGenerationConfig));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Note: Hardware constraint (refer to description of this function) */
|
||||||
|
/* DAC instance must be disabled. */
|
||||||
|
if(LL_DAC_IsEnabled(DACx, DAC_Channel) == 0U)
|
||||||
|
{
|
||||||
|
/* Configuration of DAC channel: */
|
||||||
|
/* - TriggerSource */
|
||||||
|
/* - WaveAutoGeneration */
|
||||||
|
/* - OutputBuffer */
|
||||||
|
if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
|
||||||
|
{
|
||||||
|
MODIFY_REG(DACx->CR,
|
||||||
|
( DAC_CR_TSEL1
|
||||||
|
| DAC_CR_WAVE1
|
||||||
|
| DAC_CR_MAMP1
|
||||||
|
| DAC_CR_BOFF1
|
||||||
|
) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
|
||||||
|
,
|
||||||
|
( DAC_InitStruct->TriggerSource
|
||||||
|
| DAC_InitStruct->WaveAutoGeneration
|
||||||
|
| DAC_InitStruct->WaveAutoGenerationConfig
|
||||||
|
| DAC_InitStruct->OutputBuffer
|
||||||
|
) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
|
||||||
|
);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
MODIFY_REG(DACx->CR,
|
||||||
|
( DAC_CR_TSEL1
|
||||||
|
| DAC_CR_WAVE1
|
||||||
|
| DAC_CR_BOFF1
|
||||||
|
) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
|
||||||
|
,
|
||||||
|
( DAC_InitStruct->TriggerSource
|
||||||
|
| LL_DAC_WAVE_AUTO_GENERATION_NONE
|
||||||
|
| DAC_InitStruct->OutputBuffer
|
||||||
|
) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
|
||||||
|
);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Initialization error: DAC instance is not disabled. */
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set each @ref LL_DAC_InitTypeDef field to default value.
|
||||||
|
* @param DAC_InitStruct pointer to a @ref LL_DAC_InitTypeDef structure
|
||||||
|
* whose fields will be set to default values.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct)
|
||||||
|
{
|
||||||
|
/* Set DAC_InitStruct fields to default values */
|
||||||
|
DAC_InitStruct->TriggerSource = LL_DAC_TRIG_SOFTWARE;
|
||||||
|
DAC_InitStruct->WaveAutoGeneration = LL_DAC_WAVE_AUTO_GENERATION_NONE;
|
||||||
|
/* Note: Parameter discarded if wave auto generation is disabled, */
|
||||||
|
/* set anyway to its default value. */
|
||||||
|
DAC_InitStruct->WaveAutoGenerationConfig = LL_DAC_NOISE_LFSR_UNMASK_BIT0;
|
||||||
|
DAC_InitStruct->OutputBuffer = LL_DAC_OUTPUT_BUFFER_ENABLE;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* DAC1 || DAC2 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* USE_FULL_LL_DRIVER */
|
||||||
|
|
||||||
@ -0,0 +1,334 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_dma.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief DMA LL module driver.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file in
|
||||||
|
* the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#if defined(USE_FULL_LL_DRIVER)
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx_ll_dma.h"
|
||||||
|
#include "stm32f3xx_ll_bus.h"
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
#include "stm32_assert.h"
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (DMA1) || defined (DMA2)
|
||||||
|
|
||||||
|
/** @defgroup DMA_LL DMA
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @addtogroup DMA_LL_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY) || \
|
||||||
|
((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) || \
|
||||||
|
((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY))
|
||||||
|
|
||||||
|
#define IS_LL_DMA_MODE(__VALUE__) (((__VALUE__) == LL_DMA_MODE_NORMAL) || \
|
||||||
|
((__VALUE__) == LL_DMA_MODE_CIRCULAR))
|
||||||
|
|
||||||
|
#define IS_LL_DMA_PERIPHINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) || \
|
||||||
|
((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT))
|
||||||
|
|
||||||
|
#define IS_LL_DMA_MEMORYINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) || \
|
||||||
|
((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT))
|
||||||
|
|
||||||
|
#define IS_LL_DMA_PERIPHDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE) || \
|
||||||
|
((__VALUE__) == LL_DMA_PDATAALIGN_HALFWORD) || \
|
||||||
|
((__VALUE__) == LL_DMA_PDATAALIGN_WORD))
|
||||||
|
|
||||||
|
#define IS_LL_DMA_MEMORYDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_MDATAALIGN_BYTE) || \
|
||||||
|
((__VALUE__) == LL_DMA_MDATAALIGN_HALFWORD) || \
|
||||||
|
((__VALUE__) == LL_DMA_MDATAALIGN_WORD))
|
||||||
|
|
||||||
|
#define IS_LL_DMA_NBDATA(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
|
||||||
|
|
||||||
|
|
||||||
|
#define IS_LL_DMA_PRIORITY(__VALUE__) (((__VALUE__) == LL_DMA_PRIORITY_LOW) || \
|
||||||
|
((__VALUE__) == LL_DMA_PRIORITY_MEDIUM) || \
|
||||||
|
((__VALUE__) == LL_DMA_PRIORITY_HIGH) || \
|
||||||
|
((__VALUE__) == LL_DMA_PRIORITY_VERYHIGH))
|
||||||
|
|
||||||
|
#if defined (DMA2)
|
||||||
|
#if defined (DMA2_Channel6) && defined (DMA2_Channel7)
|
||||||
|
#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
|
||||||
|
(((CHANNEL) == LL_DMA_CHANNEL_1) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_2) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_3) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_4) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_5) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_6) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_7))) || \
|
||||||
|
(((INSTANCE) == DMA2) && \
|
||||||
|
(((CHANNEL) == LL_DMA_CHANNEL_1) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_2) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_3) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_4) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_5) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_6) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_7))))
|
||||||
|
#else
|
||||||
|
#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
|
||||||
|
(((CHANNEL) == LL_DMA_CHANNEL_1) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_2) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_3) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_4) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_5) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_6) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_7))) || \
|
||||||
|
(((INSTANCE) == DMA2) && \
|
||||||
|
(((CHANNEL) == LL_DMA_CHANNEL_1) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_2) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_3) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_4) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_5))))
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
|
||||||
|
(((CHANNEL) == LL_DMA_CHANNEL_1)|| \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_2) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_3) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_4) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_5) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_6) || \
|
||||||
|
((CHANNEL) == LL_DMA_CHANNEL_7))))
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup DMA_LL_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup DMA_LL_EF_Init
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief De-initialize the DMA registers to their default reset values.
|
||||||
|
* @param DMAx DMAx Instance
|
||||||
|
* @param Channel This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_1
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_2
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_3
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_4
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_5
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_6
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_7
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: DMA registers are de-initialized
|
||||||
|
* - ERROR: DMA registers are not de-initialized
|
||||||
|
*/
|
||||||
|
uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel)
|
||||||
|
{
|
||||||
|
DMA_Channel_TypeDef *tmp = (DMA_Channel_TypeDef *)DMA1_Channel1;
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Check the DMA Instance DMAx and Channel parameters*/
|
||||||
|
assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel));
|
||||||
|
|
||||||
|
tmp = (DMA_Channel_TypeDef *)(__LL_DMA_GET_CHANNEL_INSTANCE(DMAx, Channel));
|
||||||
|
|
||||||
|
/* Disable the selected DMAx_Channely */
|
||||||
|
CLEAR_BIT(tmp->CCR, DMA_CCR_EN);
|
||||||
|
|
||||||
|
/* Reset DMAx_Channely control register */
|
||||||
|
LL_DMA_WriteReg(tmp, CCR, 0U);
|
||||||
|
|
||||||
|
/* Reset DMAx_Channely remaining bytes register */
|
||||||
|
LL_DMA_WriteReg(tmp, CNDTR, 0U);
|
||||||
|
|
||||||
|
/* Reset DMAx_Channely peripheral address register */
|
||||||
|
LL_DMA_WriteReg(tmp, CPAR, 0U);
|
||||||
|
|
||||||
|
/* Reset DMAx_Channely memory address register */
|
||||||
|
LL_DMA_WriteReg(tmp, CMAR, 0U);
|
||||||
|
|
||||||
|
|
||||||
|
if (Channel == LL_DMA_CHANNEL_1)
|
||||||
|
{
|
||||||
|
/* Reset interrupt pending bits for DMAx Channel1 */
|
||||||
|
LL_DMA_ClearFlag_GI1(DMAx);
|
||||||
|
}
|
||||||
|
else if (Channel == LL_DMA_CHANNEL_2)
|
||||||
|
{
|
||||||
|
/* Reset interrupt pending bits for DMAx Channel2 */
|
||||||
|
LL_DMA_ClearFlag_GI2(DMAx);
|
||||||
|
}
|
||||||
|
else if (Channel == LL_DMA_CHANNEL_3)
|
||||||
|
{
|
||||||
|
/* Reset interrupt pending bits for DMAx Channel3 */
|
||||||
|
LL_DMA_ClearFlag_GI3(DMAx);
|
||||||
|
}
|
||||||
|
else if (Channel == LL_DMA_CHANNEL_4)
|
||||||
|
{
|
||||||
|
/* Reset interrupt pending bits for DMAx Channel4 */
|
||||||
|
LL_DMA_ClearFlag_GI4(DMAx);
|
||||||
|
}
|
||||||
|
else if (Channel == LL_DMA_CHANNEL_5)
|
||||||
|
{
|
||||||
|
/* Reset interrupt pending bits for DMAx Channel5 */
|
||||||
|
LL_DMA_ClearFlag_GI5(DMAx);
|
||||||
|
}
|
||||||
|
|
||||||
|
else if (Channel == LL_DMA_CHANNEL_6)
|
||||||
|
{
|
||||||
|
/* Reset interrupt pending bits for DMAx Channel6 */
|
||||||
|
LL_DMA_ClearFlag_GI6(DMAx);
|
||||||
|
}
|
||||||
|
else if (Channel == LL_DMA_CHANNEL_7)
|
||||||
|
{
|
||||||
|
/* Reset interrupt pending bits for DMAx Channel7 */
|
||||||
|
LL_DMA_ClearFlag_GI7(DMAx);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the DMA registers according to the specified parameters in DMA_InitStruct.
|
||||||
|
* @note To convert DMAx_Channely Instance to DMAx Instance and Channely, use helper macros :
|
||||||
|
* @arg @ref __LL_DMA_GET_INSTANCE
|
||||||
|
* @arg @ref __LL_DMA_GET_CHANNEL
|
||||||
|
* @param DMAx DMAx Instance
|
||||||
|
* @param Channel This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_1
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_2
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_3
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_4
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_5
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_6
|
||||||
|
* @arg @ref LL_DMA_CHANNEL_7
|
||||||
|
* @param DMA_InitStruct pointer to a @ref LL_DMA_InitTypeDef structure.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: DMA registers are initialized
|
||||||
|
* - ERROR: Not applicable
|
||||||
|
*/
|
||||||
|
uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct)
|
||||||
|
{
|
||||||
|
/* Check the DMA Instance DMAx and Channel parameters*/
|
||||||
|
assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel));
|
||||||
|
|
||||||
|
/* Check the DMA parameters from DMA_InitStruct */
|
||||||
|
assert_param(IS_LL_DMA_DIRECTION(DMA_InitStruct->Direction));
|
||||||
|
assert_param(IS_LL_DMA_MODE(DMA_InitStruct->Mode));
|
||||||
|
assert_param(IS_LL_DMA_PERIPHINCMODE(DMA_InitStruct->PeriphOrM2MSrcIncMode));
|
||||||
|
assert_param(IS_LL_DMA_MEMORYINCMODE(DMA_InitStruct->MemoryOrM2MDstIncMode));
|
||||||
|
assert_param(IS_LL_DMA_PERIPHDATASIZE(DMA_InitStruct->PeriphOrM2MSrcDataSize));
|
||||||
|
assert_param(IS_LL_DMA_MEMORYDATASIZE(DMA_InitStruct->MemoryOrM2MDstDataSize));
|
||||||
|
assert_param(IS_LL_DMA_NBDATA(DMA_InitStruct->NbData));
|
||||||
|
assert_param(IS_LL_DMA_PRIORITY(DMA_InitStruct->Priority));
|
||||||
|
|
||||||
|
/*---------------------------- DMAx CCR Configuration ------------------------
|
||||||
|
* Configure DMAx_Channely: data transfer direction, data transfer mode,
|
||||||
|
* peripheral and memory increment mode,
|
||||||
|
* data size alignment and priority level with parameters :
|
||||||
|
* - Direction: DMA_CCR_DIR and DMA_CCR_MEM2MEM bits
|
||||||
|
* - Mode: DMA_CCR_CIRC bit
|
||||||
|
* - PeriphOrM2MSrcIncMode: DMA_CCR_PINC bit
|
||||||
|
* - MemoryOrM2MDstIncMode: DMA_CCR_MINC bit
|
||||||
|
* - PeriphOrM2MSrcDataSize: DMA_CCR_PSIZE[1:0] bits
|
||||||
|
* - MemoryOrM2MDstDataSize: DMA_CCR_MSIZE[1:0] bits
|
||||||
|
* - Priority: DMA_CCR_PL[1:0] bits
|
||||||
|
*/
|
||||||
|
LL_DMA_ConfigTransfer(DMAx, Channel, DMA_InitStruct->Direction | \
|
||||||
|
DMA_InitStruct->Mode | \
|
||||||
|
DMA_InitStruct->PeriphOrM2MSrcIncMode | \
|
||||||
|
DMA_InitStruct->MemoryOrM2MDstIncMode | \
|
||||||
|
DMA_InitStruct->PeriphOrM2MSrcDataSize | \
|
||||||
|
DMA_InitStruct->MemoryOrM2MDstDataSize | \
|
||||||
|
DMA_InitStruct->Priority);
|
||||||
|
|
||||||
|
/*-------------------------- DMAx CMAR Configuration -------------------------
|
||||||
|
* Configure the memory or destination base address with parameter :
|
||||||
|
* - MemoryOrM2MDstAddress: DMA_CMAR_MA[31:0] bits
|
||||||
|
*/
|
||||||
|
LL_DMA_SetMemoryAddress(DMAx, Channel, DMA_InitStruct->MemoryOrM2MDstAddress);
|
||||||
|
|
||||||
|
/*-------------------------- DMAx CPAR Configuration -------------------------
|
||||||
|
* Configure the peripheral or source base address with parameter :
|
||||||
|
* - PeriphOrM2MSrcAddress: DMA_CPAR_PA[31:0] bits
|
||||||
|
*/
|
||||||
|
LL_DMA_SetPeriphAddress(DMAx, Channel, DMA_InitStruct->PeriphOrM2MSrcAddress);
|
||||||
|
|
||||||
|
/*--------------------------- DMAx CNDTR Configuration -----------------------
|
||||||
|
* Configure the peripheral base address with parameter :
|
||||||
|
* - NbData: DMA_CNDTR_NDT[15:0] bits
|
||||||
|
*/
|
||||||
|
LL_DMA_SetDataLength(DMAx, Channel, DMA_InitStruct->NbData);
|
||||||
|
|
||||||
|
|
||||||
|
return SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set each @ref LL_DMA_InitTypeDef field to default value.
|
||||||
|
* @param DMA_InitStruct Pointer to a @ref LL_DMA_InitTypeDef structure.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct)
|
||||||
|
{
|
||||||
|
/* Set DMA_InitStruct fields to default values */
|
||||||
|
DMA_InitStruct->PeriphOrM2MSrcAddress = 0x00000000U;
|
||||||
|
DMA_InitStruct->MemoryOrM2MDstAddress = 0x00000000U;
|
||||||
|
DMA_InitStruct->Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
|
||||||
|
DMA_InitStruct->Mode = LL_DMA_MODE_NORMAL;
|
||||||
|
DMA_InitStruct->PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
|
||||||
|
DMA_InitStruct->MemoryOrM2MDstIncMode = LL_DMA_MEMORY_NOINCREMENT;
|
||||||
|
DMA_InitStruct->PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
|
||||||
|
DMA_InitStruct->MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
|
||||||
|
DMA_InitStruct->NbData = 0x00000000U;
|
||||||
|
DMA_InitStruct->Priority = LL_DMA_PRIORITY_LOW;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* DMA1 || DMA2 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* USE_FULL_LL_DRIVER */
|
||||||
|
|
||||||
@ -0,0 +1,299 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_exti.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief EXTI LL module driver.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#if defined(USE_FULL_LL_DRIVER)
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx_ll_exti.h"
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
#include "stm32_assert.h"
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (EXTI)
|
||||||
|
|
||||||
|
/** @defgroup EXTI_LL EXTI
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @addtogroup EXTI_LL_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U)
|
||||||
|
#if defined(EXTI_32_63_SUPPORT)
|
||||||
|
#define IS_LL_EXTI_LINE_32_63(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_32_63) == 0x00000000U)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \
|
||||||
|
|| ((__VALUE__) == LL_EXTI_MODE_EVENT) \
|
||||||
|
|| ((__VALUE__) == LL_EXTI_MODE_IT_EVENT))
|
||||||
|
|
||||||
|
|
||||||
|
#define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \
|
||||||
|
|| ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \
|
||||||
|
|| ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \
|
||||||
|
|| ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup EXTI_LL_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup EXTI_LL_EF_Init
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief De-initialize the EXTI registers to their default reset values.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: EXTI registers are de-initialized
|
||||||
|
* - ERROR: not applicable
|
||||||
|
*/
|
||||||
|
uint32_t LL_EXTI_DeInit(void)
|
||||||
|
{
|
||||||
|
/* Interrupt mask register set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(IMR, 0x1F800000U);
|
||||||
|
/* Event mask register set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(EMR, 0x00000000U);
|
||||||
|
/* Rising Trigger selection register set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(RTSR, 0x00000000U);
|
||||||
|
/* Falling Trigger selection register set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(FTSR, 0x00000000U);
|
||||||
|
/* Software interrupt event register set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(SWIER, 0x00000000U);
|
||||||
|
/* Pending register clear */
|
||||||
|
LL_EXTI_WriteReg(PR, 0x007FFFFFU);
|
||||||
|
|
||||||
|
#if defined(EXTI_32_63_SUPPORT)
|
||||||
|
/* Interrupt mask register 2 set to default reset values */
|
||||||
|
#if defined(STM32F334x8)
|
||||||
|
LL_EXTI_WriteReg(IMR2, 0xFFFFFFFEU);
|
||||||
|
#else
|
||||||
|
LL_EXTI_WriteReg(IMR2, 0xFFFFFFFCU);
|
||||||
|
#endif
|
||||||
|
/* Event mask register 2 set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(EMR2, 0x00000000U);
|
||||||
|
/* Rising Trigger selection register 2 set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(RTSR2, 0x00000000U);
|
||||||
|
/* Falling Trigger selection register 2 set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(FTSR2, 0x00000000U);
|
||||||
|
/* Software interrupt event register 2 set to default reset values */
|
||||||
|
LL_EXTI_WriteReg(SWIER2, 0x00000000U);
|
||||||
|
/* Pending register 2 clear */
|
||||||
|
LL_EXTI_WriteReg(PR2, 0x00000003U);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
return SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct.
|
||||||
|
* @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: EXTI registers are initialized
|
||||||
|
* - ERROR: not applicable
|
||||||
|
*/
|
||||||
|
uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31));
|
||||||
|
#if defined(EXTI_32_63_SUPPORT)
|
||||||
|
assert_param(IS_LL_EXTI_LINE_32_63(EXTI_InitStruct->Line_32_63));
|
||||||
|
#endif
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand));
|
||||||
|
assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode));
|
||||||
|
|
||||||
|
/* ENABLE LineCommand */
|
||||||
|
if (EXTI_InitStruct->LineCommand != DISABLE)
|
||||||
|
{
|
||||||
|
assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger));
|
||||||
|
|
||||||
|
/* Configure EXTI Lines in range from 0 to 31 */
|
||||||
|
if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE)
|
||||||
|
{
|
||||||
|
switch (EXTI_InitStruct->Mode)
|
||||||
|
{
|
||||||
|
case LL_EXTI_MODE_IT:
|
||||||
|
/* First Disable Event on provided Lines */
|
||||||
|
LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
/* Then Enable IT on provided Lines */
|
||||||
|
LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_MODE_EVENT:
|
||||||
|
/* First Disable IT on provided Lines */
|
||||||
|
LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
/* Then Enable Event on provided Lines */
|
||||||
|
LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_MODE_IT_EVENT:
|
||||||
|
/* Directly Enable IT & Event on provided Lines */
|
||||||
|
LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
status = ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
|
||||||
|
{
|
||||||
|
switch (EXTI_InitStruct->Trigger)
|
||||||
|
{
|
||||||
|
case LL_EXTI_TRIGGER_RISING:
|
||||||
|
/* First Disable Falling Trigger on provided Lines */
|
||||||
|
LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
/* Then Enable Rising Trigger on provided Lines */
|
||||||
|
LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_TRIGGER_FALLING:
|
||||||
|
/* First Disable Rising Trigger on provided Lines */
|
||||||
|
LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
/* Then Enable Falling Trigger on provided Lines */
|
||||||
|
LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_TRIGGER_RISING_FALLING:
|
||||||
|
LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
status = ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#if defined(EXTI_32_63_SUPPORT)
|
||||||
|
/* Configure EXTI Lines in range from 32 to 63 */
|
||||||
|
if (EXTI_InitStruct->Line_32_63 != LL_EXTI_LINE_NONE)
|
||||||
|
{
|
||||||
|
switch (EXTI_InitStruct->Mode)
|
||||||
|
{
|
||||||
|
case LL_EXTI_MODE_IT:
|
||||||
|
/* First Disable Event on provided Lines */
|
||||||
|
LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
/* Then Enable IT on provided Lines */
|
||||||
|
LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_MODE_EVENT:
|
||||||
|
/* First Disable IT on provided Lines */
|
||||||
|
LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
/* Then Enable Event on provided Lines */
|
||||||
|
LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_MODE_IT_EVENT:
|
||||||
|
/* Directly Enable IT & Event on provided Lines */
|
||||||
|
LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
status = ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
|
||||||
|
{
|
||||||
|
switch (EXTI_InitStruct->Trigger)
|
||||||
|
{
|
||||||
|
case LL_EXTI_TRIGGER_RISING:
|
||||||
|
/* First Disable Falling Trigger on provided Lines */
|
||||||
|
LL_EXTI_DisableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
/* Then Enable IT on provided Lines */
|
||||||
|
LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_TRIGGER_FALLING:
|
||||||
|
/* First Disable Rising Trigger on provided Lines */
|
||||||
|
LL_EXTI_DisableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
/* Then Enable Falling Trigger on provided Lines */
|
||||||
|
LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
break;
|
||||||
|
case LL_EXTI_TRIGGER_RISING_FALLING:
|
||||||
|
LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
status = ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
/* DISABLE LineCommand */
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* De-configure EXTI Lines in range from 0 to 31 */
|
||||||
|
LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
|
||||||
|
#if defined(EXTI_32_63_SUPPORT)
|
||||||
|
/* De-configure EXTI Lines in range from 32 to 63 */
|
||||||
|
LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set each @ref LL_EXTI_InitTypeDef field to default value.
|
||||||
|
* @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct)
|
||||||
|
{
|
||||||
|
EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE;
|
||||||
|
#if defined(EXTI_32_63_SUPPORT)
|
||||||
|
EXTI_InitStruct->Line_32_63 = LL_EXTI_LINE_NONE;
|
||||||
|
#endif
|
||||||
|
EXTI_InitStruct->LineCommand = DISABLE;
|
||||||
|
EXTI_InitStruct->Mode = LL_EXTI_MODE_IT;
|
||||||
|
EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* defined (EXTI) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* USE_FULL_LL_DRIVER */
|
||||||
|
|
||||||
@ -0,0 +1,295 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_gpio.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief GPIO LL module driver.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#if defined(USE_FULL_LL_DRIVER)
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx_ll_gpio.h"
|
||||||
|
#include "stm32f3xx_ll_bus.h"
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
#include "stm32_assert.h"
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH)
|
||||||
|
|
||||||
|
/** @addtogroup GPIO_LL
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** MISRA C:2012 deviation rule has been granted for following rules:
|
||||||
|
* Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of
|
||||||
|
* range of the shift operator in following API :
|
||||||
|
* LL_GPIO_Init
|
||||||
|
* LL_GPIO_DeInit
|
||||||
|
* LL_GPIO_SetPinMode
|
||||||
|
* LL_GPIO_GetPinMode
|
||||||
|
* LL_GPIO_SetPinSpeed
|
||||||
|
* LL_GPIO_GetPinSpeed
|
||||||
|
* LL_GPIO_SetPinPull
|
||||||
|
* LL_GPIO_GetPinPull
|
||||||
|
* LL_GPIO_GetAFPin_0_7
|
||||||
|
* LL_GPIO_SetAFPin_0_7
|
||||||
|
* LL_GPIO_SetAFPin_8_15
|
||||||
|
* LL_GPIO_GetAFPin_8_15
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @addtogroup GPIO_LL_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_LL_GPIO_PIN(__VALUE__) (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
|
||||||
|
|
||||||
|
#define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_MODE_ANALOG))
|
||||||
|
|
||||||
|
#define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
|
||||||
|
|
||||||
|
#define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH))
|
||||||
|
|
||||||
|
#define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_PULL_UP) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_PULL_DOWN))
|
||||||
|
|
||||||
|
#define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_1 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_2 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_3 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_4 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_5 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_6 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_7 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_8 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_9 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_10 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_11 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_12 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_13 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_14 ) ||\
|
||||||
|
((__VALUE__) == LL_GPIO_AF_15 ))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup GPIO_LL_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup GPIO_LL_EF_Init
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief De-initialize GPIO registers (Registers restored to their default values).
|
||||||
|
* @param GPIOx GPIO Port
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: GPIO registers are de-initialized
|
||||||
|
* - ERROR: Wrong GPIO Port
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||||||
|
|
||||||
|
/* Force and Release reset on clock of GPIOx Port */
|
||||||
|
if (GPIOx == GPIOA)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOA);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOA);
|
||||||
|
}
|
||||||
|
else if (GPIOx == GPIOB)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOB);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOB);
|
||||||
|
}
|
||||||
|
else if (GPIOx == GPIOC)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOC);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOC);
|
||||||
|
}
|
||||||
|
#if defined(GPIOD)
|
||||||
|
else if (GPIOx == GPIOD)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD);
|
||||||
|
}
|
||||||
|
#endif /* GPIOD */
|
||||||
|
#if defined(GPIOE)
|
||||||
|
else if (GPIOx == GPIOE)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOE);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOE);
|
||||||
|
}
|
||||||
|
#endif /* GPIOE */
|
||||||
|
#if defined(GPIOF)
|
||||||
|
else if (GPIOx == GPIOF)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOF);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOF);
|
||||||
|
}
|
||||||
|
#endif /* GPIOF */
|
||||||
|
#if defined(GPIOG)
|
||||||
|
else if (GPIOx == GPIOG)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOG);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOG);
|
||||||
|
}
|
||||||
|
#endif /* GPIOG */
|
||||||
|
#if defined(GPIOH)
|
||||||
|
else if (GPIOx == GPIOH)
|
||||||
|
{
|
||||||
|
LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOH);
|
||||||
|
LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOH);
|
||||||
|
}
|
||||||
|
#endif /* GPIOH */
|
||||||
|
else
|
||||||
|
{
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (status);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
|
||||||
|
* @param GPIOx GPIO Port
|
||||||
|
* @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
|
||||||
|
* that contains the configuration information for the specified GPIO peripheral.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
|
||||||
|
* - ERROR: Not applicable
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
|
||||||
|
{
|
||||||
|
uint32_t pinpos;
|
||||||
|
uint32_t currentpin;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||||||
|
assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
|
||||||
|
assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
|
||||||
|
assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
|
||||||
|
|
||||||
|
/* ------------------------- Configure the port pins ---------------- */
|
||||||
|
/* Initialize pinpos on first pin set */
|
||||||
|
pinpos = POSITION_VAL(GPIO_InitStruct->Pin);
|
||||||
|
|
||||||
|
/* Configure the port pins */
|
||||||
|
while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00u)
|
||||||
|
{
|
||||||
|
/* Get current io position */
|
||||||
|
currentpin = (GPIO_InitStruct->Pin) & (0x00000001uL << pinpos);
|
||||||
|
|
||||||
|
if (currentpin != 0x00u)
|
||||||
|
{
|
||||||
|
if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
|
||||||
|
{
|
||||||
|
/* Check Speed mode parameters */
|
||||||
|
assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
|
||||||
|
|
||||||
|
/* Speed mode configuration */
|
||||||
|
LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
|
||||||
|
|
||||||
|
/* Check Output mode parameters */
|
||||||
|
assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
|
||||||
|
|
||||||
|
/* Output mode configuration*/
|
||||||
|
LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Pull-up Pull down resistor configuration*/
|
||||||
|
LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
|
||||||
|
|
||||||
|
if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
|
||||||
|
{
|
||||||
|
/* Check Alternate parameter */
|
||||||
|
assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
|
||||||
|
|
||||||
|
/* Speed mode configuration */
|
||||||
|
if (POSITION_VAL(currentpin) < 0x00000008U)
|
||||||
|
{
|
||||||
|
LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Pin Mode configuration */
|
||||||
|
LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
|
||||||
|
}
|
||||||
|
pinpos++;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (SUCCESS);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
|
||||||
|
* @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
|
||||||
|
* whose fields will be set to default values.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
|
||||||
|
void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
|
||||||
|
{
|
||||||
|
/* Reset GPIO init structure parameters values */
|
||||||
|
GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL;
|
||||||
|
GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG;
|
||||||
|
GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||||
|
GPIO_InitStruct->Pull = LL_GPIO_PULL_NO;
|
||||||
|
GPIO_InitStruct->Alternate = LL_GPIO_AF_0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* USE_FULL_LL_DRIVER */
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,442 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_usart.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief USART LL module driver.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#if defined(USE_FULL_LL_DRIVER)
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx_ll_usart.h"
|
||||||
|
#include "stm32f3xx_ll_rcc.h"
|
||||||
|
#include "stm32f3xx_ll_bus.h"
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
#include "stm32_assert.h"
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5)
|
||||||
|
|
||||||
|
/** @addtogroup USART_LL
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/** @addtogroup USART_LL_Private_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Definition of default baudrate value used for USART initialisation */
|
||||||
|
#define USART_DEFAULT_BAUDRATE (9600U)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @addtogroup USART_LL_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
|
||||||
|
* divided by the smallest oversampling used on the USART (i.e. 8) */
|
||||||
|
#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 9000000U)
|
||||||
|
|
||||||
|
/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
|
||||||
|
#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
|
||||||
|
|
||||||
|
#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
|
||||||
|
|| ((__VALUE__) == LL_USART_DIRECTION_RX) \
|
||||||
|
|| ((__VALUE__) == LL_USART_DIRECTION_TX) \
|
||||||
|
|| ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
|
||||||
|
|
||||||
|
#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
|
||||||
|
|| ((__VALUE__) == LL_USART_PARITY_EVEN) \
|
||||||
|
|| ((__VALUE__) == LL_USART_PARITY_ODD))
|
||||||
|
|
||||||
|
#if defined(USART_7BITS_SUPPORT)
|
||||||
|
#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
|
||||||
|
|| ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
|
||||||
|
|| ((__VALUE__) == LL_USART_DATAWIDTH_9B))
|
||||||
|
#else
|
||||||
|
#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
|
||||||
|
|| ((__VALUE__) == LL_USART_DATAWIDTH_9B))
|
||||||
|
#endif /* USART_7BITS_SUPPORT */
|
||||||
|
|
||||||
|
#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
|
||||||
|
|| ((__VALUE__) == LL_USART_OVERSAMPLING_8))
|
||||||
|
|
||||||
|
#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
|
||||||
|
|| ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
|
||||||
|
|
||||||
|
#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
|
||||||
|
|| ((__VALUE__) == LL_USART_PHASE_2EDGE))
|
||||||
|
|
||||||
|
#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
|
||||||
|
|| ((__VALUE__) == LL_USART_POLARITY_HIGH))
|
||||||
|
|
||||||
|
#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
|
||||||
|
|| ((__VALUE__) == LL_USART_CLOCK_ENABLE))
|
||||||
|
|
||||||
|
#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
|
||||||
|
|| ((__VALUE__) == LL_USART_STOPBITS_1) \
|
||||||
|
|| ((__VALUE__) == LL_USART_STOPBITS_1_5) \
|
||||||
|
|| ((__VALUE__) == LL_USART_STOPBITS_2))
|
||||||
|
|
||||||
|
#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
|
||||||
|
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
|
||||||
|
|| ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
|
||||||
|
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup USART_LL_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup USART_LL_EF_Init
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief De-initialize USART registers (Registers restored to their default values).
|
||||||
|
* @param USARTx USART Instance
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: USART registers are de-initialized
|
||||||
|
* - ERROR: USART registers are not de-initialized
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_UART_INSTANCE(USARTx));
|
||||||
|
|
||||||
|
if (USARTx == USART1)
|
||||||
|
{
|
||||||
|
/* Force reset of USART clock */
|
||||||
|
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
|
||||||
|
|
||||||
|
/* Release reset of USART clock */
|
||||||
|
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
|
||||||
|
}
|
||||||
|
else if (USARTx == USART2)
|
||||||
|
{
|
||||||
|
/* Force reset of USART clock */
|
||||||
|
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
|
||||||
|
|
||||||
|
/* Release reset of USART clock */
|
||||||
|
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
|
||||||
|
}
|
||||||
|
else if (USARTx == USART3)
|
||||||
|
{
|
||||||
|
/* Force reset of USART clock */
|
||||||
|
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
|
||||||
|
|
||||||
|
/* Release reset of USART clock */
|
||||||
|
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
|
||||||
|
}
|
||||||
|
#if defined(UART4)
|
||||||
|
else if (USARTx == UART4)
|
||||||
|
{
|
||||||
|
/* Force reset of UART clock */
|
||||||
|
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
|
||||||
|
|
||||||
|
/* Release reset of UART clock */
|
||||||
|
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
|
||||||
|
}
|
||||||
|
#endif /* UART4 */
|
||||||
|
#if defined(UART5)
|
||||||
|
else if (USARTx == UART5)
|
||||||
|
{
|
||||||
|
/* Force reset of UART clock */
|
||||||
|
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
|
||||||
|
|
||||||
|
/* Release reset of UART clock */
|
||||||
|
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
|
||||||
|
}
|
||||||
|
#endif /* UART5 */
|
||||||
|
else
|
||||||
|
{
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (status);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize USART registers according to the specified
|
||||||
|
* parameters in USART_InitStruct.
|
||||||
|
* @note As some bits in USART configuration registers can only be written when
|
||||||
|
* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
|
||||||
|
* this function. Otherwise, ERROR result will be returned.
|
||||||
|
* @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
|
||||||
|
* @param USARTx USART Instance
|
||||||
|
* @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
|
||||||
|
* that contains the configuration information for the specified USART peripheral.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: USART registers are initialized according to USART_InitStruct content
|
||||||
|
* - ERROR: Problem occurred during USART Registers initialization
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
|
||||||
|
{
|
||||||
|
ErrorStatus status = ERROR;
|
||||||
|
uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
|
||||||
|
#if (!defined(RCC_CFGR3_USART2SW)||!defined (RCC_CFGR3_USART3SW))
|
||||||
|
LL_RCC_ClocksTypeDef RCC_Clocks;
|
||||||
|
#endif /* USART clock selection flags */
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_UART_INSTANCE(USARTx));
|
||||||
|
assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
|
||||||
|
assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
|
||||||
|
assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
|
||||||
|
assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
|
||||||
|
assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
|
||||||
|
assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
|
||||||
|
assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
|
||||||
|
|
||||||
|
/* USART needs to be in disabled state, in order to be able to configure some bits in
|
||||||
|
CRx registers */
|
||||||
|
if (LL_USART_IsEnabled(USARTx) == 0U)
|
||||||
|
{
|
||||||
|
/*---------------------------- USART CR1 Configuration ---------------------
|
||||||
|
* Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
|
||||||
|
* - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
|
||||||
|
* - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
|
||||||
|
* - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
|
||||||
|
* - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
|
||||||
|
*/
|
||||||
|
MODIFY_REG(USARTx->CR1,
|
||||||
|
(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
|
||||||
|
USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
|
||||||
|
(USART_InitStruct->DataWidth | USART_InitStruct->Parity |
|
||||||
|
USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
|
||||||
|
|
||||||
|
/*---------------------------- USART CR2 Configuration ---------------------
|
||||||
|
* Configure USARTx CR2 (Stop bits) with parameters:
|
||||||
|
* - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
|
||||||
|
* - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
|
||||||
|
*/
|
||||||
|
LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
|
||||||
|
|
||||||
|
/*---------------------------- USART CR3 Configuration ---------------------
|
||||||
|
* Configure USARTx CR3 (Hardware Flow Control) with parameters:
|
||||||
|
* - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
|
||||||
|
* USART_InitStruct->HardwareFlowControl value.
|
||||||
|
*/
|
||||||
|
LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
|
||||||
|
|
||||||
|
/*---------------------------- USART BRR Configuration ---------------------
|
||||||
|
* Retrieve Clock frequency used for USART Peripheral
|
||||||
|
*/
|
||||||
|
if (USARTx == USART1)
|
||||||
|
{
|
||||||
|
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
|
||||||
|
}
|
||||||
|
else if (USARTx == USART2)
|
||||||
|
{
|
||||||
|
#if defined(RCC_CFGR3_USART2SW)
|
||||||
|
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
|
||||||
|
#else
|
||||||
|
/* USART2 clock is PCLK */
|
||||||
|
LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
|
||||||
|
periphclk = RCC_Clocks.PCLK1_Frequency;
|
||||||
|
#endif /* USART2 Clock selector flag */
|
||||||
|
}
|
||||||
|
else if (USARTx == USART3)
|
||||||
|
{
|
||||||
|
#if defined(RCC_CFGR3_USART3SW)
|
||||||
|
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
|
||||||
|
#else
|
||||||
|
/* USART3 clock is PCLK */
|
||||||
|
LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
|
||||||
|
periphclk = RCC_Clocks.PCLK1_Frequency;
|
||||||
|
#endif /* USART3 Clock selector flag */
|
||||||
|
}
|
||||||
|
#if defined(UART4)
|
||||||
|
else if (USARTx == UART4)
|
||||||
|
{
|
||||||
|
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
|
||||||
|
}
|
||||||
|
#endif /* UART4 */
|
||||||
|
#if defined(UART5)
|
||||||
|
else if (USARTx == UART5)
|
||||||
|
{
|
||||||
|
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
|
||||||
|
}
|
||||||
|
#endif /* UART5 */
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Nothing to do, as error code is already assigned to ERROR value */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Configure the USART Baud Rate :
|
||||||
|
- valid baud rate value (different from 0) is required
|
||||||
|
- Peripheral clock as returned by RCC service, should be valid (different from 0).
|
||||||
|
*/
|
||||||
|
if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
|
||||||
|
&& (USART_InitStruct->BaudRate != 0U))
|
||||||
|
{
|
||||||
|
status = SUCCESS;
|
||||||
|
LL_USART_SetBaudRate(USARTx,
|
||||||
|
periphclk,
|
||||||
|
USART_InitStruct->OverSampling,
|
||||||
|
USART_InitStruct->BaudRate);
|
||||||
|
|
||||||
|
/* Check BRR is greater than or equal to 16d */
|
||||||
|
assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* Endif (=> USART not in Disabled state => return ERROR) */
|
||||||
|
|
||||||
|
return (status);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set each @ref LL_USART_InitTypeDef field to default value.
|
||||||
|
* @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
|
||||||
|
* whose fields will be set to default values.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
|
||||||
|
void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
|
||||||
|
{
|
||||||
|
/* Set USART_InitStruct fields to default values */
|
||||||
|
USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
|
||||||
|
USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
|
||||||
|
USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
|
||||||
|
USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
|
||||||
|
USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
|
||||||
|
USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
|
||||||
|
USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize USART Clock related settings according to the
|
||||||
|
* specified parameters in the USART_ClockInitStruct.
|
||||||
|
* @note As some bits in USART configuration registers can only be written when
|
||||||
|
* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
|
||||||
|
* this function. Otherwise, ERROR result will be returned.
|
||||||
|
* @param USARTx USART Instance
|
||||||
|
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
|
||||||
|
* that contains the Clock configuration information for the specified USART peripheral.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: USART registers related to Clock settings are initialized according
|
||||||
|
* to USART_ClockInitStruct content
|
||||||
|
* - ERROR: Problem occurred during USART Registers initialization
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Check USART Instance and Clock signal output parameters */
|
||||||
|
assert_param(IS_UART_INSTANCE(USARTx));
|
||||||
|
assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
|
||||||
|
|
||||||
|
/* USART needs to be in disabled state, in order to be able to configure some bits in
|
||||||
|
CRx registers */
|
||||||
|
if (LL_USART_IsEnabled(USARTx) == 0U)
|
||||||
|
{
|
||||||
|
/* If USART Clock signal is disabled */
|
||||||
|
if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
|
||||||
|
{
|
||||||
|
/* Deactivate Clock signal delivery :
|
||||||
|
* - Disable Clock Output: USART_CR2_CLKEN cleared
|
||||||
|
*/
|
||||||
|
LL_USART_DisableSCLKOutput(USARTx);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Ensure USART instance is USART capable */
|
||||||
|
assert_param(IS_USART_INSTANCE(USARTx));
|
||||||
|
|
||||||
|
/* Check clock related parameters */
|
||||||
|
assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
|
||||||
|
assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
|
||||||
|
assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
|
||||||
|
|
||||||
|
/*---------------------------- USART CR2 Configuration -----------------------
|
||||||
|
* Configure USARTx CR2 (Clock signal related bits) with parameters:
|
||||||
|
* - Enable Clock Output: USART_CR2_CLKEN set
|
||||||
|
* - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
|
||||||
|
* - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
|
||||||
|
* - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
|
||||||
|
*/
|
||||||
|
MODIFY_REG(USARTx->CR2,
|
||||||
|
USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
|
||||||
|
USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
|
||||||
|
USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* Else (USART not in Disabled state => return ERROR */
|
||||||
|
else
|
||||||
|
{
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (status);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
|
||||||
|
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
|
||||||
|
* whose fields will be set to default values.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
|
||||||
|
{
|
||||||
|
/* Set LL_USART_ClockInitStruct fields with default values */
|
||||||
|
USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
|
||||||
|
USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
|
||||||
|
LL_USART_CLOCK_DISABLE */
|
||||||
|
USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
|
||||||
|
LL_USART_CLOCK_DISABLE */
|
||||||
|
USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
|
||||||
|
LL_USART_CLOCK_DISABLE */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* USE_FULL_LL_DRIVER */
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,575 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f3xx_ll_utils.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief UTILS LL module driver.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f3xx_ll_rcc.h"
|
||||||
|
#include "stm32f3xx_ll_utils.h"
|
||||||
|
#include "stm32f3xx_ll_system.h"
|
||||||
|
#include "stm32f3xx_ll_pwr.h"
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
#include "stm32_assert.h"
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F3xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup UTILS_LL
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/** @addtogroup UTILS_LL_Private_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Defines used for PLL range */
|
||||||
|
#define UTILS_PLL_OUTPUT_MAX 72000000U /*!< Frequency max for PLL output, in Hz */
|
||||||
|
|
||||||
|
/* Defines used for HSE range */
|
||||||
|
#define UTILS_HSE_FREQUENCY_MIN 4000000U /*!< Frequency min for HSE frequency, in Hz */
|
||||||
|
#define UTILS_HSE_FREQUENCY_MAX 32000000U /*!< Frequency max for HSE frequency, in Hz */
|
||||||
|
|
||||||
|
/* Defines used for FLASH latency according to SYSCLK Frequency */
|
||||||
|
#define UTILS_LATENCY1_FREQ 24000000U /*!< SYSCLK frequency to set FLASH latency 1 */
|
||||||
|
#define UTILS_LATENCY2_FREQ 48000000U /*!< SYSCLK frequency to set FLASH latency 2 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @addtogroup UTILS_LL_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_SYSCLK_DIV_512))
|
||||||
|
|
||||||
|
#define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB1_DIV_2) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB1_DIV_4) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB1_DIV_8) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB1_DIV_16))
|
||||||
|
|
||||||
|
#define IS_LL_UTILS_APB2_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB2_DIV_1) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB2_DIV_2) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB2_DIV_4) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB2_DIV_8) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_APB2_DIV_16))
|
||||||
|
|
||||||
|
#define IS_LL_UTILS_PLLMUL_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_MUL_2) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_3) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_4) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_5) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_6) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_7) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_8) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_9) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_10) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_11) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_12) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_13) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_14) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_15) \
|
||||||
|
|| ((__VALUE__) == LL_RCC_PLL_MUL_16))
|
||||||
|
|
||||||
|
#define IS_LL_UTILS_PREDIV_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PREDIV_DIV_1) || ((__VALUE__) == LL_RCC_PREDIV_DIV_2) || \
|
||||||
|
((__VALUE__) == LL_RCC_PREDIV_DIV_3) || ((__VALUE__) == LL_RCC_PREDIV_DIV_4) || \
|
||||||
|
((__VALUE__) == LL_RCC_PREDIV_DIV_5) || ((__VALUE__) == LL_RCC_PREDIV_DIV_6) || \
|
||||||
|
((__VALUE__) == LL_RCC_PREDIV_DIV_7) || ((__VALUE__) == LL_RCC_PREDIV_DIV_8) || \
|
||||||
|
((__VALUE__) == LL_RCC_PREDIV_DIV_9) || ((__VALUE__) == LL_RCC_PREDIV_DIV_10) || \
|
||||||
|
((__VALUE__) == LL_RCC_PREDIV_DIV_11) || ((__VALUE__) == LL_RCC_PREDIV_DIV_12) || \
|
||||||
|
((__VALUE__) == LL_RCC_PREDIV_DIV_13) || ((__VALUE__) == LL_RCC_PREDIV_DIV_14) || \
|
||||||
|
((__VALUE__) == LL_RCC_PREDIV_DIV_15) || ((__VALUE__) == LL_RCC_PREDIV_DIV_16))
|
||||||
|
|
||||||
|
#define IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) ((__VALUE__) <= UTILS_PLL_OUTPUT_MAX)
|
||||||
|
|
||||||
|
|
||||||
|
#define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \
|
||||||
|
|| ((__STATE__) == LL_UTILS_HSEBYPASS_OFF))
|
||||||
|
|
||||||
|
#define IS_LL_UTILS_HSE_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) >= UTILS_HSE_FREQUENCY_MIN) && ((__FREQUENCY__) <= UTILS_HSE_FREQUENCY_MAX))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/** @defgroup UTILS_LL_Private_Functions UTILS Private functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency,
|
||||||
|
LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct);
|
||||||
|
static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
|
||||||
|
static ErrorStatus UTILS_PLL_IsBusy(void);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup UTILS_LL_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup UTILS_LL_EF_DELAY
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function configures the Cortex-M SysTick source to have 1ms time base.
|
||||||
|
* @note When a RTOS is used, it is recommended to avoid changing the Systick
|
||||||
|
* configuration by calling this function, for a delay use rather osDelay RTOS service.
|
||||||
|
* @param HCLKFrequency HCLK frequency in Hz
|
||||||
|
* @note HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void LL_Init1msTick(uint32_t HCLKFrequency)
|
||||||
|
{
|
||||||
|
/* Use frequency provided in argument */
|
||||||
|
LL_InitTick(HCLKFrequency, 1000U);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function provides accurate delay (in milliseconds) based
|
||||||
|
* on SysTick counter flag
|
||||||
|
* @note When a RTOS is used, it is recommended to avoid using blocking delay
|
||||||
|
* and use rather osDelay service.
|
||||||
|
* @note To respect 1ms timebase, user should call @ref LL_Init1msTick function which
|
||||||
|
* will configure Systick to 1ms
|
||||||
|
* @param Delay specifies the delay time length, in milliseconds.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void LL_mDelay(uint32_t Delay)
|
||||||
|
{
|
||||||
|
__IO uint32_t tmp = SysTick->CTRL; /* Clear the COUNTFLAG first */
|
||||||
|
/* Add this code to indicate that local variable is not used */
|
||||||
|
((void)tmp);
|
||||||
|
|
||||||
|
/* Add a period to guaranty minimum wait */
|
||||||
|
if (Delay < LL_MAX_DELAY)
|
||||||
|
{
|
||||||
|
Delay++;
|
||||||
|
}
|
||||||
|
|
||||||
|
while (Delay)
|
||||||
|
{
|
||||||
|
if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U)
|
||||||
|
{
|
||||||
|
Delay--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup UTILS_EF_SYSTEM
|
||||||
|
* @brief System Configuration functions
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
===============================================================================
|
||||||
|
##### System Configuration functions #####
|
||||||
|
===============================================================================
|
||||||
|
[..]
|
||||||
|
System, AHB and APB buses clocks configuration
|
||||||
|
|
||||||
|
(+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 72000000 Hz.
|
||||||
|
@endverbatim
|
||||||
|
@internal
|
||||||
|
Depending on the SYSCLK frequency, the flash latency should be adapted accordingly:
|
||||||
|
(++) +-----------------------------------------------+
|
||||||
|
(++) | Latency | SYSCLK clock frequency (MHz) |
|
||||||
|
(++) |---------------|-------------------------------|
|
||||||
|
(++) |0WS(1CPU cycle)| 0 < SYSCLK <= 24 |
|
||||||
|
(++) |---------------|-------------------------------|
|
||||||
|
(++) |1WS(2CPU cycle)| 24 < SYSCLK <= 48 |
|
||||||
|
(++) |---------------|-------------------------------|
|
||||||
|
(++) |2WS(3CPU cycle)| 48 < SYSCLK <= 72 |
|
||||||
|
(++) +-----------------------------------------------+
|
||||||
|
@endinternal
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function sets directly SystemCoreClock CMSIS variable.
|
||||||
|
* @note Variable can be calculated also through SystemCoreClockUpdate function.
|
||||||
|
* @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
|
||||||
|
{
|
||||||
|
/* HCLK clock frequency */
|
||||||
|
SystemCoreClock = HCLKFrequency;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update number of Flash wait states in line with new frequency and current
|
||||||
|
voltage range.
|
||||||
|
* @param Frequency SYSCLK frequency
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: Latency has been modified
|
||||||
|
* - ERROR: Latency cannot be modified
|
||||||
|
*/
|
||||||
|
#if defined(FLASH_ACR_LATENCY)
|
||||||
|
ErrorStatus LL_SetFlashLatency(uint32_t Frequency)
|
||||||
|
{
|
||||||
|
uint32_t timeout;
|
||||||
|
uint32_t getlatency;
|
||||||
|
uint32_t latency;
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Frequency cannot be equal to 0 */
|
||||||
|
if (Frequency == 0U)
|
||||||
|
{
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if (Frequency > UTILS_LATENCY2_FREQ)
|
||||||
|
{
|
||||||
|
/* 48 < SYSCLK <= 72 => 2WS (3 CPU cycles) */
|
||||||
|
latency = LL_FLASH_LATENCY_2;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if (Frequency > UTILS_LATENCY1_FREQ)
|
||||||
|
{
|
||||||
|
/* 24 < SYSCLK <= 48 => 1WS (2 CPU cycles) */
|
||||||
|
latency = LL_FLASH_LATENCY_1;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* else SYSCLK < 24MHz default LL_FLASH_LATENCY_0 0WS */
|
||||||
|
latency = LL_FLASH_LATENCY_0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
LL_FLASH_SetLatency(latency);
|
||||||
|
|
||||||
|
/* Check that the new number of wait states is taken into account to access the Flash
|
||||||
|
memory by reading the FLASH_ACR register */
|
||||||
|
timeout = 2;
|
||||||
|
do
|
||||||
|
{
|
||||||
|
/* Wait for Flash latency to be updated */
|
||||||
|
getlatency = LL_FLASH_GetLatency();
|
||||||
|
timeout--;
|
||||||
|
} while ((getlatency != latency) && (timeout > 0));
|
||||||
|
|
||||||
|
if(getlatency != latency)
|
||||||
|
{
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
#endif /* FLASH_ACR_LATENCY */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function configures system clock with HSI as clock source of the PLL
|
||||||
|
* @note The application need to ensure that PLL is disabled.
|
||||||
|
* @note Function is based on the following formula:
|
||||||
|
* - PLL output frequency = ((HSI frequency / PREDIV) * PLLMUL)
|
||||||
|
* - PREDIV: Set to 2 for few devices
|
||||||
|
* - PLLMUL: The application software must set correctly the PLL multiplication factor to
|
||||||
|
* not exceed 72MHz
|
||||||
|
* @note FLASH latency can be modified through this function.
|
||||||
|
* @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
|
||||||
|
* the configuration information for the PLL.
|
||||||
|
* @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
|
||||||
|
* the configuration information for the BUS prescalers.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: Max frequency configuration done
|
||||||
|
* - ERROR: Max frequency configuration not done
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
|
||||||
|
LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
uint32_t pllfreq = 0U;
|
||||||
|
|
||||||
|
/* Check if one of the PLL is enabled */
|
||||||
|
if (UTILS_PLL_IsBusy() == SUCCESS)
|
||||||
|
{
|
||||||
|
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
|
||||||
|
/* Check PREDIV value */
|
||||||
|
assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->PLLDiv));
|
||||||
|
#else
|
||||||
|
/* Force PREDIV value to 2 */
|
||||||
|
UTILS_PLLInitStruct->Prediv = LL_RCC_PREDIV_DIV_2;
|
||||||
|
#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
|
||||||
|
/* Calculate the new PLL output frequency */
|
||||||
|
pllfreq = UTILS_GetPLLOutputFrequency(HSI_VALUE, UTILS_PLLInitStruct);
|
||||||
|
|
||||||
|
/* Enable HSI if not enabled */
|
||||||
|
if (LL_RCC_HSI_IsReady() != 1U)
|
||||||
|
{
|
||||||
|
LL_RCC_HSI_Enable();
|
||||||
|
while (LL_RCC_HSI_IsReady() != 1U)
|
||||||
|
{
|
||||||
|
/* Wait for HSI ready */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Configure PLL */
|
||||||
|
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
|
||||||
|
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
|
||||||
|
#else
|
||||||
|
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI_DIV_2, UTILS_PLLInitStruct->PLLMul);
|
||||||
|
#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
|
||||||
|
|
||||||
|
/* Enable PLL and switch system clock to PLL */
|
||||||
|
status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Current PLL configuration cannot be modified */
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function configures system clock with HSE as clock source of the PLL
|
||||||
|
* @note The application need to ensure that PLL is disabled.
|
||||||
|
* @note Function is based on the following formula:
|
||||||
|
* - PLL output frequency = ((HSI frequency / PREDIV) * PLLMUL)
|
||||||
|
* - PREDIV: Set to 2 for few devices
|
||||||
|
* - PLLMUL: The application software must set correctly the PLL multiplication factor to
|
||||||
|
* not exceed @ref UTILS_PLL_OUTPUT_MAX
|
||||||
|
* @note FLASH latency can be modified through this function.
|
||||||
|
* @param HSEFrequency Value between Min_Data = 4000000 and Max_Data = 32000000
|
||||||
|
* @param HSEBypass This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_UTILS_HSEBYPASS_ON
|
||||||
|
* @arg @ref LL_UTILS_HSEBYPASS_OFF
|
||||||
|
* @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
|
||||||
|
* the configuration information for the PLL.
|
||||||
|
* @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
|
||||||
|
* the configuration information for the BUS prescalers.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: Max frequency configuration done
|
||||||
|
* - ERROR: Max frequency configuration not done
|
||||||
|
*/
|
||||||
|
ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
|
||||||
|
LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
uint32_t pllfreq = 0U;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_LL_UTILS_HSE_FREQUENCY(HSEFrequency));
|
||||||
|
assert_param(IS_LL_UTILS_HSE_BYPASS(HSEBypass));
|
||||||
|
|
||||||
|
/* Check if one of the PLL is enabled */
|
||||||
|
if (UTILS_PLL_IsBusy() == SUCCESS)
|
||||||
|
{
|
||||||
|
/* Check PREDIV value */
|
||||||
|
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
|
||||||
|
assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->PLLDiv));
|
||||||
|
#else
|
||||||
|
assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->Prediv));
|
||||||
|
#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
|
||||||
|
|
||||||
|
/* Calculate the new PLL output frequency */
|
||||||
|
pllfreq = UTILS_GetPLLOutputFrequency(HSEFrequency, UTILS_PLLInitStruct);
|
||||||
|
|
||||||
|
/* Enable HSE if not enabled */
|
||||||
|
if (LL_RCC_HSE_IsReady() != 1U)
|
||||||
|
{
|
||||||
|
/* Check if need to enable HSE bypass feature or not */
|
||||||
|
if (HSEBypass == LL_UTILS_HSEBYPASS_ON)
|
||||||
|
{
|
||||||
|
LL_RCC_HSE_EnableBypass();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
LL_RCC_HSE_DisableBypass();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Enable HSE */
|
||||||
|
LL_RCC_HSE_Enable();
|
||||||
|
while (LL_RCC_HSE_IsReady() != 1U)
|
||||||
|
{
|
||||||
|
/* Wait for HSE ready */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Configure PLL */
|
||||||
|
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
|
||||||
|
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
|
||||||
|
#else
|
||||||
|
LL_RCC_PLL_ConfigDomain_SYS((RCC_CFGR_PLLSRC_HSE_PREDIV | UTILS_PLLInitStruct->Prediv), UTILS_PLLInitStruct->PLLMul);
|
||||||
|
#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
|
||||||
|
|
||||||
|
/* Enable PLL and switch system clock to PLL */
|
||||||
|
status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Current PLL configuration cannot be modified */
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup UTILS_LL_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* @brief Function to check that PLL can be modified
|
||||||
|
* @param PLL_InputFrequency PLL input frequency (in Hz)
|
||||||
|
* @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
|
||||||
|
* the configuration information for the PLL.
|
||||||
|
* @retval PLL output frequency (in Hz)
|
||||||
|
*/
|
||||||
|
static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct)
|
||||||
|
{
|
||||||
|
uint32_t pllfreq = 0U;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_LL_UTILS_PLLMUL_VALUE(UTILS_PLLInitStruct->PLLMul));
|
||||||
|
|
||||||
|
/* Check different PLL parameters according to RM */
|
||||||
|
/* The application software must set correctly the PLL multiplication factor to
|
||||||
|
not exceed @ref UTILS_PLL_OUTPUT_MAX */
|
||||||
|
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
|
||||||
|
pllfreq = __LL_RCC_CALC_PLLCLK_FREQ(PLL_InputFrequency, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
|
||||||
|
#else
|
||||||
|
pllfreq = __LL_RCC_CALC_PLLCLK_FREQ(PLL_InputFrequency / (UTILS_PLLInitStruct->Prediv + 1U), UTILS_PLLInitStruct->PLLMul);
|
||||||
|
#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
|
||||||
|
assert_param(IS_LL_UTILS_PLL_FREQUENCY(pllfreq));
|
||||||
|
|
||||||
|
return pllfreq;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Function to check that PLL can be modified
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: PLL modification can be done
|
||||||
|
* - ERROR: PLL is busy
|
||||||
|
*/
|
||||||
|
static ErrorStatus UTILS_PLL_IsBusy(void)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
|
||||||
|
/* Check if PLL is busy*/
|
||||||
|
if (LL_RCC_PLL_IsReady() != 0U)
|
||||||
|
{
|
||||||
|
/* PLL configuration cannot be modified */
|
||||||
|
status = ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Function to enable PLL and switch system clock to PLL
|
||||||
|
* @param SYSCLK_Frequency SYSCLK frequency
|
||||||
|
* @param UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
|
||||||
|
* the configuration information for the BUS prescalers.
|
||||||
|
* @retval An ErrorStatus enumeration value:
|
||||||
|
* - SUCCESS: No problem to switch system to PLL
|
||||||
|
* - ERROR: Problem to switch system to PLL
|
||||||
|
*/
|
||||||
|
static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
|
||||||
|
{
|
||||||
|
ErrorStatus status = SUCCESS;
|
||||||
|
uint32_t sysclk_frequency_current = 0U;
|
||||||
|
|
||||||
|
assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider));
|
||||||
|
assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider));
|
||||||
|
assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider));
|
||||||
|
|
||||||
|
/* Calculate current SYSCLK frequency */
|
||||||
|
sysclk_frequency_current = (SystemCoreClock << AHBPrescTable[LL_RCC_GetAHBPrescaler() >> RCC_POSITION_HPRE]);
|
||||||
|
|
||||||
|
/* Increasing the number of wait states because of higher CPU frequency */
|
||||||
|
if (sysclk_frequency_current < SYSCLK_Frequency)
|
||||||
|
{
|
||||||
|
/* Set FLASH latency to highest latency */
|
||||||
|
status = LL_SetFlashLatency(SYSCLK_Frequency);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Update system clock configuration */
|
||||||
|
if (status == SUCCESS)
|
||||||
|
{
|
||||||
|
/* Enable PLL */
|
||||||
|
LL_RCC_PLL_Enable();
|
||||||
|
while (LL_RCC_PLL_IsReady() != 1U)
|
||||||
|
{
|
||||||
|
/* Wait for PLL ready */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Sysclk activation on the main PLL */
|
||||||
|
LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider);
|
||||||
|
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||||
|
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||||
|
{
|
||||||
|
/* Wait for system clock switch to PLL */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set APB1 & APB2 prescaler*/
|
||||||
|
LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider);
|
||||||
|
LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
||||||
|
if (sysclk_frequency_current > SYSCLK_Frequency)
|
||||||
|
{
|
||||||
|
/* Set FLASH latency to lowest latency */
|
||||||
|
status = LL_SetFlashLatency(SYSCLK_Frequency);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Update SystemCoreClock variable */
|
||||||
|
if (status == SUCCESS)
|
||||||
|
{
|
||||||
|
LL_SetSystemCoreClock(__LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider));
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
Loading…
Reference in New Issue