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DigitalAudioH533
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6 Commits (4928e529f6181bbdfe96820bb3ef7b9196457602)

Author SHA1 Message Date
unicod e81f6126c7 I2C1 enabled via CubeMX (LL) 
- PCLK: 32MHz (PLL3R)
- 100kHz
- no INT
- SCL: PB6
- SDA: PB7
 4 weeks ago
unicod 483f9d4762 I2S2 full-duplex master 
- fs: 32 kHz
- PLL2P: 20.48 Mhz
- I2S 32 bit
- PC2   --> SDI
- PB12  --> WS
- PB13  --> CK
- PB15  --> SDO
 4 weeks ago
unicod 336c397135 USART3 DMA RX/TX works 
- Rx/Tx handler in usart3_dma.*
- CubeMX: USART and DMA init
- DMA CH0: Tx
- DMA CH1: Rx
- DMA Port0 for periph transfer
- DMA Port1 for mem transfer
- Continuous Rx handling via DMA pointer (no INT, no TC flag)
- Tx: collect data into tx buf or send immediately
 4 weeks ago
unicod bb4098a48b Added interrupt driven UART5 
- 115200 baud
- TX: PC12
- RX: PD2
- clk: PLL3Q 32MHz
 4 weeks ago
unicod 705a5221df TIM5: free running timer with [us] resolution 
- usTimerGetAbs
- usTimerGetRel
- Delay_us
 4 weeks ago
unicod 25af824727 Project generated from MX 
- 16MHz crystal osc
- 80Mhz sys clk with PLL
- icache enabled
- using LL lib
 4 weeks ago