I2C1 enabled via CubeMX (LL)
- PCLK: 32MHz (PLL3R) - 100kHz - no INT - SCL: PB6 - SDA: PB7master
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/**
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******************************************************************************
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* @file stm32h5xx_ll_i2c.c
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* @author MCD Application Team
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* @brief I2C LL module driver.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#if defined(USE_FULL_LL_DRIVER)
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h5xx_ll_i2c.h"
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#include "stm32h5xx_ll_bus.h"
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#ifdef USE_FULL_ASSERT
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#include "stm32_assert.h"
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */
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/** @addtogroup STM32H5xx_LL_Driver
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* @{
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*/
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#if defined (I2C1) || defined (I2C2) || defined (I2C3) || defined (I2C4)
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/** @defgroup I2C_LL I2C
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup I2C_LL_Private_Macros
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* @{
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*/
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#define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
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((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
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((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
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((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
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#define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
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((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
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#define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
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#define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
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#define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
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((__VALUE__) == LL_I2C_NACK))
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#define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
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((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
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/**
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* @}
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*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup I2C_LL_Exported_Functions
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* @{
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*/
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/** @addtogroup I2C_LL_EF_Init
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* @{
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*/
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/**
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* @brief De-initialize the I2C registers to their default reset values.
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* @param I2Cx I2C Instance.
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: I2C registers are de-initialized
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* - ERROR: I2C registers are not de-initialized
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*/
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ErrorStatus LL_I2C_DeInit(const I2C_TypeDef *I2Cx)
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{
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ErrorStatus status = SUCCESS;
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/* Check the I2C Instance I2Cx */
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assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
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if (I2Cx == I2C1)
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{
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/* Force reset of I2C clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
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/* Release reset of I2C clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
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}
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else if (I2Cx == I2C2)
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{
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/* Force reset of I2C clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
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/* Release reset of I2C clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
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}
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#if defined(I2C3)
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else if (I2Cx == I2C3)
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{
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/* Force reset of I2C clock */
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LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_I2C3);
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/* Release reset of I2C clock */
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LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_I2C3);
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}
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#endif /* I2C3 */
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#if defined(I2C4)
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else if (I2Cx == I2C4)
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{
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/* Force reset of I2C clock */
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LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_I2C4);
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/* Release reset of I2C clock */
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LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_I2C4);
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}
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#endif /* I2C4 */
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else
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{
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status = ERROR;
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}
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return status;
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}
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/**
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* @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
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* @param I2Cx I2C Instance.
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* @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: I2C registers are initialized
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* - ERROR: Not applicable
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*/
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ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, const LL_I2C_InitTypeDef *I2C_InitStruct)
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{
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/* Check the I2C Instance I2Cx */
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assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
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/* Check the I2C parameters from I2C_InitStruct */
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assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
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assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
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assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
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assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
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assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
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assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
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/* Disable the selected I2Cx Peripheral */
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LL_I2C_Disable(I2Cx);
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/*---------------------------- I2Cx CR1 Configuration ------------------------
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* Configure the analog and digital noise filters with parameters :
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* - AnalogFilter: I2C_CR1_ANFOFF bit
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* - DigitalFilter: I2C_CR1_DNF[3:0] bits
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*/
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LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
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/*---------------------------- I2Cx TIMINGR Configuration --------------------
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* Configure the SDA setup, hold time and the SCL high, low period with parameter :
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* - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
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* I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
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*/
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LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
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/* Enable the selected I2Cx Peripheral */
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LL_I2C_Enable(I2Cx);
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/*---------------------------- I2Cx OAR1 Configuration -----------------------
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* Disable, Configure and Enable I2Cx device own address 1 with parameters :
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* - OwnAddress1: I2C_OAR1_OA1[9:0] bits
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* - OwnAddrSize: I2C_OAR1_OA1MODE bit
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*/
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LL_I2C_DisableOwnAddress1(I2Cx);
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LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
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/* OwnAdress1 == 0 is reserved for General Call address */
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if (I2C_InitStruct->OwnAddress1 != 0U)
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{
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LL_I2C_EnableOwnAddress1(I2Cx);
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}
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/*---------------------------- I2Cx MODE Configuration -----------------------
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* Configure I2Cx peripheral mode with parameter :
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* - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
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*/
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LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
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/*---------------------------- I2Cx CR2 Configuration ------------------------
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* Configure the ACKnowledge or Non ACKnowledge condition
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* after the address receive match code or next received byte with parameter :
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* - TypeAcknowledge: I2C_CR2_NACK bit
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*/
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LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
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return SUCCESS;
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}
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/**
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* @brief Set each @ref LL_I2C_InitTypeDef field to default value.
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* @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
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* @retval None
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*/
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void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
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{
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/* Set I2C_InitStruct fields to default values */
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I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
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I2C_InitStruct->Timing = 0U;
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I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
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I2C_InitStruct->DigitalFilter = 0U;
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I2C_InitStruct->OwnAddress1 = 0U;
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I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
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I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* I2C1 || I2C2 || I2C3 || I2C4 */
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/**
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* @}
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*/
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#endif /* USE_FULL_LL_DRIVER */
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