Added interrupt driven UART5

- 115200 baud
- TX: PC12
- RX: PD2
- clk: PLL3Q 32MHz
master
unicod 1 month ago
parent 037f2d3b94
commit bb4098a48b

@ -1,8 +1,8 @@
[PreviousLibFiles]
LibFiles=Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_gpio.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_system.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_exti.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_cortex.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_bus.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_rcc.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_crs.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_utils.h;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_pwr.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dma.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dmamux.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_icache.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_tim.h;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_gpio.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_rcc.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_icache.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_pwr.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_tim.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_dma.c;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_gpio.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_system.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_exti.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_cortex.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_bus.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_rcc.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_crs.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_utils.h;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_pwr.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dma.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dmamux.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_icache.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_tim.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h533xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;Drivers\CMSIS\Include\cachel1_armv7.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\pac_armv81.h;Drivers\CMSIS\Include\pmu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
LibFiles=Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_gpio.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_system.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_exti.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_cortex.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_bus.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_rcc.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_crs.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_utils.h;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_pwr.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dma.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dmamux.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_icache.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_tim.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_usart.h;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_gpio.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_rcc.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_icache.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_pwr.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_tim.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_dma.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_usart.c;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_gpio.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_system.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_exti.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_cortex.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_bus.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_rcc.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_crs.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_utils.h;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_pwr.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dma.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_dmamux.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_icache.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_tim.h;Drivers\STM32H5xx_HAL_Driver\Inc\stm32h5xx_ll_usart.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h533xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\stm32h5xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Include\system_stm32h5xx.h;Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;Drivers\CMSIS\Include\cachel1_armv7.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\pac_armv81.h;Drivers\CMSIS\Include\pmu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
[PreviousUsedCubeIDEFiles]
SourceFiles=Core\Src\main.c;Core\Src\stm32h5xx_it.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_gpio.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_rcc.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_icache.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_pwr.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_tim.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_dma.c;Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;Core\Src\system_stm32h5xx.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_gpio.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_rcc.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_icache.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_pwr.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_tim.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_dma.c;Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;Core\Src\system_stm32h5xx.c;;;
SourceFiles=Core\Src\main.c;Core\Src\stm32h5xx_it.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_gpio.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_rcc.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_icache.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_pwr.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_tim.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_dma.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_usart.c;Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;Core\Src\system_stm32h5xx.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_utils.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_exti.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_gpio.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_rcc.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_icache.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_pwr.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_tim.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_dma.c;Drivers\STM32H5xx_HAL_Driver\Src\stm32h5xx_ll_usart.c;Drivers\CMSIS\Device\ST\STM32H5xx\Source\Templates\system_stm32h5xx.c;Core\Src\system_stm32h5xx.c;;;
HeaderPath=Drivers\STM32H5xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32H5xx\Include;Drivers\CMSIS\Include;Core\Inc;
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:16000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:64000000;LSI_VALUE:32000;VDD_VALUE:3300;STM32H533xx;USE_FULL_LL_DRIVER;HSE_VALUE:16000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:64000000;LSI_VALUE:32000;VDD_VALUE:3300;

@ -38,6 +38,7 @@ extern "C" {
#include "stm32h5xx_ll_utils.h"
#include "stm32h5xx_ll_dma.h"
#include "stm32h5xx_ll_tim.h"
#include "stm32h5xx_ll_usart.h"
#include "stm32h5xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT)

@ -0,0 +1,13 @@
#ifndef __UART5_IT_H__
#define __UART5_IT_H__
#include <stdint.h>
extern void Uart5_Init(void);
extern void Uart5_PutByte(uint8_t d);
extern void Uart5_PutData(const void* src, uint16_t n);
extern int16_t Uart5_GetByte(void);
#endif

@ -0,0 +1,12 @@
#ifndef __USART5_IT_CFG_H__
#define __USART5_IT_CFG_H__
#include "stm32h5xx_ll_usart.h"
#define UART5_RXBUF_SIZE 1024
#define UART5_TXBUF_SIZE 1024
#endif // __USART5_CFG_H__

@ -21,7 +21,10 @@
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <string.h>
#include "disp7seg.h"
#include "uart5_it.h"
/* USER CODE END Includes */
@ -48,10 +51,12 @@
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void PeriphCommonClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_ICACHE_Init(void);
static void MX_TIM5_Init(void);
static void MX_TIM2_Init(void);
static void MX_UART5_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -109,6 +114,9 @@ int main(void)
/* Configure the system clock */
SystemClock_Config();
/* Configure the peripherals common clocks */
PeriphCommonClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
@ -118,6 +126,7 @@ int main(void)
MX_ICACHE_Init();
MX_TIM5_Init();
MX_TIM2_Init();
MX_UART5_Init();
/* USER CODE BEGIN 2 */
LL_TIM_GenerateEvent_UPDATE(TIM2);
LL_TIM_EnableCounter(TIM2);
@ -132,6 +141,10 @@ int main(void)
DispPutDigit(3, ' ', 0);
ShiftReg_Update();
Uart5_Init();
char* s = "Hello, world!\r\n";
Uart5_PutData(s, strlen(s));
/* USER CODE END 2 */
/* Infinite loop */
@ -147,10 +160,10 @@ int main(void)
if (TickChk(&Tick1secRef, 1000)) { // execute every 1s
LD2_Toggle();
static uint8_t cnt = 0;
DispPutDigit(0, '0'+cnt, 0);
DispPutDigit(1, 'a'+cnt, 1);
DispPutDigit(2, 'A'+cnt, 0);
cnt = (cnt + 1) % 16;
Uart5_PutByte('0' + cnt);
}
static uint32_t Tick100msRef = 0;
@ -159,6 +172,12 @@ int main(void)
dot ^= 1; // toggle dot
DispPutDigit(3, ' ', dot);
}
int16_t ch = Uart5_GetByte();
if (ch != -1) { // if data received
char c = ch;
DispPutDigit(0, c, 0);
}
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
@ -221,6 +240,30 @@ void SystemClock_Config(void)
LL_SetSystemCoreClock(80000000);
}
/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void)
{
LL_RCC_PLL3_SetSource(LL_RCC_PLL3SOURCE_HSE);
LL_RCC_PLL3_SetVCOInputRange(LL_RCC_PLLINPUTRANGE_8_16);
LL_RCC_PLL3_SetVCOOutputRange(LL_RCC_PLLVCORANGE_WIDE);
LL_RCC_PLL3_SetM(1);
LL_RCC_PLL3_SetN(8);
LL_RCC_PLL3_SetP(2);
LL_RCC_PLL3_SetQ(4);
LL_RCC_PLL3_SetR(2);
LL_RCC_PLL3Q_Enable();
LL_RCC_PLL3_Enable();
/* Wait till PLL is ready */
while(LL_RCC_PLL3_IsReady() != 1)
{
}
}
/**
* @brief ICACHE Initialization Function
* @param None
@ -316,6 +359,72 @@ static void MX_TIM5_Init(void)
}
/**
* @brief UART5 Initialization Function
* @param None
* @retval None
*/
static void MX_UART5_Init(void)
{
/* USER CODE BEGIN UART5_Init 0 */
/* USER CODE END UART5_Init 0 */
LL_USART_InitTypeDef UART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
LL_RCC_SetUARTClockSource(LL_RCC_UART5_CLKSOURCE_PLL3Q);
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UART5);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD);
/**UART5 GPIO Configuration
PC12 ------> UART5_TX
PD2 ------> UART5_RX
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
LL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* UART5 interrupt Init */
NVIC_SetPriority(UART5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_Init 1 */
/* USER CODE END UART5_Init 1 */
UART_InitStruct.BaudRate = 115200;
UART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
UART_InitStruct.StopBits = LL_USART_STOPBITS_1;
UART_InitStruct.Parity = LL_USART_PARITY_NONE;
UART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
UART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
UART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(UART5, &UART_InitStruct);
LL_USART_ConfigAsyncMode(UART5);
LL_USART_Enable(UART5);
/* USER CODE BEGIN UART5_Init 2 */
/* USER CODE END UART5_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
@ -332,6 +441,7 @@ static void MX_GPIO_Init(void)
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
/**/

@ -0,0 +1,140 @@
/***************************************************************************//**
* @file uart5_it.c
* @brief UART with interrupt and ring buffer
*//****************************************************************************/
//------------------------------C library---------------------------------------
#include <stdlib.h>
//----------------------------user includes-------------------------------------
#include "uart5_it.h"
#include "uart5_it_cfg.h"
//------------------------------------------------------------------------------
/* Private typedefs ----------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
//====== UART buffer defines ===================================================
#define UART5_RXBUF_MASK (UART5_RXBUF_SIZE - 1)
#define UART5_TXBUF_MASK (UART5_TXBUF_SIZE - 1)
#if ( UART5_RXBUF_SIZE & UART5_RXBUF_MASK )
#error RX buffer size is not a power of 2!
#endif
#if ( UART5_TXBUF_SIZE & UART5_TXBUF_MASK )
#error TX buffer size is not a power of 2!
#endif
/* Private variables ---------------------------------------------------------*/
//====== Variables for transmitter =============================================
static uint8_t Uart5TxBuf[UART5_TXBUF_SIZE];
static uint16_t Uart5TxWrIdx = 0;
static volatile uint16_t Uart5TxRdIdx = 0;
//====== Variables for Receiver ================================================
static uint8_t Uart5RxBuf[UART5_RXBUF_SIZE];
static volatile uint16_t Uart5RxWrIdx = 0;
static volatile uint16_t Uart5RxRdIdx = 0;
/* Public variables ----------------------------------------------------------*/
/* Functions -----------------------------------------------------------------*/
/***************************************************************************//**
* @brief UART5 init
*//****************************************************************************/
void Uart5_Init(void) {
LL_USART_EnableIT_RXNE(UART5); // Enable RX interrupt
}
/***************************************************************************//**
* @brief UART5 interrupt handler
*//****************************************************************************/
void UART5_IRQHandler(void) {
if (LL_USART_IsActiveFlag_RXNE_RXFNE(UART5)) { // RX interrupt
uint8_t d = LL_USART_ReceiveData8(UART5); // read received byte
uint_fast16_t wr = Uart5RxWrIdx;
wr = (wr + 1) & UART5_RXBUF_MASK; // new write index
Uart5RxBuf[wr] = d; // received data to buffer
Uart5RxWrIdx = wr; // Store new index
}
if (LL_USART_IsActiveFlag_TXE_TXFNF(UART5)) { // TX interrupt
uint_fast16_t rd = Uart5TxRdIdx;
uint_fast16_t wr = Uart5TxWrIdx;
if (wr != rd) { // data in buffer
rd = (rd + 1) & UART5_TXBUF_MASK; // new read index
LL_USART_TransmitData8(UART5, Uart5TxBuf[rd]); // send data byte
Uart5TxRdIdx = rd; // Store new index
}
if (wr == rd) { // data buffer empty
LL_USART_DisableIT_TXE(UART5); // INT disable
}
}
}
/***************************************************************************//**
* @brief Send byte to UART
* @param d: byte to send
*//****************************************************************************/
void Uart5_PutByte(uint8_t d) {
LL_USART_DisableIT_TXE_TXFNF(UART5); // Interrupt disable during buffer update
uint_fast16_t wr = Uart5TxWrIdx;
wr = (wr + 1) & UART5_TXBUF_MASK; // new write index
if (wr == Uart5TxRdIdx) { // No free space in buffer (overflow)
return; // drop remaining data (Attention! Buffer overflow not signaled! Use bigger buffer)
}
Uart5TxBuf[wr] = d; // Store data in buffer
Uart5TxWrIdx = wr; // Store new index
LL_USART_EnableIT_TXE_TXFNF(UART5); // Interrupt enable (start send)
}
/***************************************************************************//**
* @brief Send more data to UART
* @param src: data to send
* @param n: count of data
*//****************************************************************************/
void Uart5_PutData (const void* src, uint16_t n) {
LL_USART_DisableIT_TXE_TXFNF(UART5); // Interrupt disable during buffer update
const uint8_t* p = src;
uint_fast16_t wr = Uart5TxWrIdx;
while (n) {
wr = (wr + 1) & UART5_TXBUF_MASK; // new write index
if (wr == Uart5TxRdIdx) { // No free space in buffer (overflow)
break; // drop remaining data (Attention! Buffer overflow not signaled! Use bigger buffer)
}
Uart5TxBuf[wr] = *p; // Store data in buffer
p++;
n--;
}
Uart5TxWrIdx = wr; // Store new index
LL_USART_EnableIT_TXE_TXFNF(UART5); // Interrupt enable (start send)
}
/***************************************************************************//**
* @brief Read data from UART RX buffer
* @return received character, -1: no data in RX buffer
*//****************************************************************************/
int16_t Uart5_GetByte(void) {
uint_fast16_t rd = Uart5RxRdIdx;
if (rd != Uart5RxWrIdx) { // new data in buffer
rd = (rd + 1) & UART5_RXBUF_MASK; // new read index
Uart5RxRdIdx = rd; // store new index
return Uart5RxBuf[rd]; // return with data
}else {
return -1; // buffer empty
}
}

@ -47,6 +47,7 @@ Mcu.Family=STM32H5
Mcu.IP0=BOOTPATH
Mcu.IP1=CORTEX_M33_NS
Mcu.IP10=TIM5
Mcu.IP11=UART5
Mcu.IP2=DEBUG
Mcu.IP3=ICACHE
Mcu.IP4=MEMORYMAP
@ -55,27 +56,29 @@ Mcu.IP6=PWR
Mcu.IP7=RCC
Mcu.IP8=SYS
Mcu.IP9=TIM2
Mcu.IPNb=11
Mcu.IPNb=12
Mcu.Name=STM32H533RETx
Mcu.Package=LQFP64
Mcu.Pin0=PC14-OSC32_IN(OSC32_IN)
Mcu.Pin1=PC15-OSC32_OUT(OSC32_OUT)
Mcu.Pin10=VP_PWR_VS_SECSignals
Mcu.Pin11=VP_PWR_VS_LPOM
Mcu.Pin12=VP_SYS_VS_Systick
Mcu.Pin13=VP_TIM2_VS_ClockSourceINT
Mcu.Pin14=VP_TIM5_VS_ClockSourceINT
Mcu.Pin15=VP_BOOTPATH_VS_BOOTPATH
Mcu.Pin16=VP_MEMORYMAP_VS_MEMORYMAP
Mcu.Pin10=VP_CORTEX_M33_NS_VS_Hclk
Mcu.Pin11=VP_ICACHE_VS_ICACHE
Mcu.Pin12=VP_PWR_VS_SECSignals
Mcu.Pin13=VP_PWR_VS_LPOM
Mcu.Pin14=VP_SYS_VS_Systick
Mcu.Pin15=VP_TIM2_VS_ClockSourceINT
Mcu.Pin16=VP_TIM5_VS_ClockSourceINT
Mcu.Pin17=VP_BOOTPATH_VS_BOOTPATH
Mcu.Pin18=VP_MEMORYMAP_VS_MEMORYMAP
Mcu.Pin2=PH0-OSC_IN(PH0)
Mcu.Pin3=PH1-OSC_OUT(PH1)
Mcu.Pin4=PA13(JTMS/SWDIO)
Mcu.Pin5=PA14(JTCK/SWCLK)
Mcu.Pin6=PC11
Mcu.Pin7=PB8
Mcu.Pin8=VP_CORTEX_M33_NS_VS_Hclk
Mcu.Pin9=VP_ICACHE_VS_ICACHE
Mcu.PinsNb=17
Mcu.Pin7=PC12
Mcu.Pin8=PD2
Mcu.Pin9=PB8
Mcu.PinsNb=19
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32H533RETx
@ -91,6 +94,7 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:false\:false\:false
NVIC.UART5_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA13(JTMS/SWDIO).Mode=Serial_Wire
PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
@ -105,6 +109,9 @@ PC11.GPIO_Label=LD2
PC11.Locked=true
PC11.PinState=GPIO_PIN_SET
PC11.Signal=GPIO_Output
PC12.Locked=true
PC12.Mode=Asynchronous
PC12.Signal=UART5_TX
PC14-OSC32_IN(OSC32_IN).GPIOParameters=GPIO_Label
PC14-OSC32_IN(OSC32_IN).GPIO_Label=SHR_CLK
PC14-OSC32_IN(OSC32_IN).Locked=true
@ -120,6 +127,9 @@ PCC.PartNumber=STM32H533RETx
PCC.Series=STM32H5
PCC.Temperature=25
PCC.Vdd=3.0
PD2.Locked=true
PD2.Mode=Asynchronous
PD2.Signal=UART5_RX
PH0-OSC_IN(PH0).Mode=HSE-External-Oscillator
PH0-OSC_IN(PH0).Signal=RCC_OSC_IN
PH1-OSC_OUT(PH1).Mode=HSE-External-Oscillator
@ -157,7 +167,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_ICACHE_Init-ICACHE-false-LL-true,4-MX_TIM5_Init-TIM5-false-LL-true,5-MX_TIM2_Init-TIM2-false-LL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-LL-true,0-MX_PWR_Init-PWR-false-LL-true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_ICACHE_Init-ICACHE-false-LL-true,4-MX_TIM5_Init-TIM5-false-LL-true,5-MX_TIM2_Init-TIM2-false-LL-true,6-MX_UART5_Init-UART5-false-LL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-LL-true,0-MX_PWR_Init-PWR-false-LL-true
RCC.ADCFreq_Value=80000000
RCC.AHBFreq_Value=80000000
RCC.APB1Freq_Value=80000000
@ -184,7 +194,7 @@ RCC.I2C2Freq_Value=80000000
RCC.I2C3Freq_Value=80000000
RCC.I3C1Freq_Value=80000000
RCC.I3C2Freq_Value=80000000
RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,CKPERFreq_Value,CKPERSourceSelection,CRSFreq_Value,CSI_VALUE,CortexFreq_Value,DACFreq_Value,EPOD_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I3C1Freq_Value,I3C2Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSIRC_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,OCTOSPIMFreq_Value,PLL1P,PLL1Q,PLL2N,PLL2PoutputFreq_Value,PLL2QoutputFreq_Value,PLL2RoutputFreq_Value,PLL2Source,PLL3N,PLL3PoutputFreq_Value,PLL3QoutputFreq_Value,PLL3RoutputFreq_Value,PLL3Source,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SDMMC1Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UCPD1outputFreq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOPLL2OutputFreq_Value,VCOPLL3OutputFreq_Value
RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,CKPERFreq_Value,CKPERSourceSelection,CRSFreq_Value,CSI_VALUE,CortexFreq_Value,DACFreq_Value,EPOD_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I3C1Freq_Value,I3C2Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSIRC_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,OCTOSPIMFreq_Value,PLL1P,PLL1Q,PLL2N,PLL2PoutputFreq_Value,PLL2QoutputFreq_Value,PLL2RoutputFreq_Value,PLL2Source,PLL3N,PLL3PoutputFreq_Value,PLL3Q,PLL3QoutputFreq_Value,PLL3RoutputFreq_Value,PLL3Source,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SDMMC1Freq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SPI4Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5CLockSelection,UART5Freq_Value,UCPD1outputFreq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOPLL2OutputFreq_Value,VCOPLL3OutputFreq_Value
RCC.LPTIM1Freq_Value=80000000
RCC.LPTIM2Freq_Value=80000000
RCC.LPUART1Freq_Value=80000000
@ -201,10 +211,11 @@ RCC.PLL2PoutputFreq_Value=80000000
RCC.PLL2QoutputFreq_Value=80000000
RCC.PLL2RoutputFreq_Value=80000000
RCC.PLL2Source=RCC_PLL2_SOURCE_HSE
RCC.PLL3N=4
RCC.PLL3PoutputFreq_Value=32000000
RCC.PLL3N=8
RCC.PLL3PoutputFreq_Value=64000000
RCC.PLL3Q=4
RCC.PLL3QoutputFreq_Value=32000000
RCC.PLL3RoutputFreq_Value=32000000
RCC.PLL3RoutputFreq_Value=64000000
RCC.PLL3Source=RCC_PLL3_SOURCE_HSE
RCC.PLLN=20
RCC.PLLPoutputFreq_Value=80000000
@ -220,7 +231,8 @@ RCC.SPI4Freq_Value=80000000
RCC.SYSCLKFreq_VALUE=80000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.UART4Freq_Value=80000000
RCC.UART5Freq_Value=80000000
RCC.UART5CLockSelection=RCC_UART5CLKSOURCE_PLL3Q
RCC.UART5Freq_Value=32000000
RCC.UCPD1outputFreq_Value=8000000
RCC.USART1Freq_Value=80000000
RCC.USART2Freq_Value=80000000
@ -232,7 +244,7 @@ RCC.VCOInput3Freq_Value=16000000
RCC.VCOInputFreq_Value=16000000
RCC.VCOOutputFreq_Value=320000000
RCC.VCOPLL2OutputFreq_Value=160000000
RCC.VCOPLL3OutputFreq_Value=64000000
RCC.VCOPLL3OutputFreq_Value=128000000
TIM2.IPParameters=Prescaler
TIM2.Prescaler=39999
TIM5.IPParameters=Prescaler

File diff suppressed because it is too large Load Diff

@ -0,0 +1,548 @@
/**
******************************************************************************
* @file stm32h5xx_ll_usart.c
* @author MCD Application Team
* @brief USART LL module driver.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
#if defined(USE_FULL_LL_DRIVER)
/* Includes ------------------------------------------------------------------*/
#include "stm32h5xx_ll_usart.h"
#include "stm32h5xx_ll_rcc.h"
#include "stm32h5xx_ll_bus.h"
#ifdef USE_FULL_ASSERT
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32H5xx_LL_Driver
* @{
*/
#if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5) || defined(USART6) \
|| defined(UART7) || defined(UART8) || defined(UART9) || defined(USART10) || defined(USART11) || defined(UART12)
/** @addtogroup USART_LL
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @addtogroup USART_LL_Private_Constants
* @{
*/
/* Definition of default baudrate value used for USART initialisation */
#define USART_DEFAULT_BAUDRATE (9600U)
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup USART_LL_Private_Macros
* @{
*/
#define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
|| ((__VALUE__) == LL_USART_PRESCALER_DIV256))
/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
* divided by the smallest oversampling used on the USART (i.e. 8) */
#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 20000000U)
/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
|| ((__VALUE__) == LL_USART_DIRECTION_RX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
|| ((__VALUE__) == LL_USART_PARITY_EVEN) \
|| ((__VALUE__) == LL_USART_PARITY_ODD))
#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
|| ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
|| ((__VALUE__) == LL_USART_DATAWIDTH_9B))
#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
|| ((__VALUE__) == LL_USART_OVERSAMPLING_8))
#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
|| ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
|| ((__VALUE__) == LL_USART_PHASE_2EDGE))
#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
|| ((__VALUE__) == LL_USART_POLARITY_HIGH))
#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
|| ((__VALUE__) == LL_USART_CLOCK_ENABLE))
#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_1) \
|| ((__VALUE__) == LL_USART_STOPBITS_1_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_2))
#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup USART_LL_Exported_Functions
* @{
*/
/** @addtogroup USART_LL_EF_Init
* @{
*/
/**
* @brief De-initialize USART registers (Registers restored to their default values).
* @param USARTx USART Instance
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers are de-initialized
* - ERROR: USART registers are not de-initialized
*/
ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_UART_INSTANCE(USARTx));
if (USARTx == USART1)
{
/* Force reset of USART clock */
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
/* Release reset of USART clock */
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
}
else if (USARTx == USART2)
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
}
else if (USARTx == USART3)
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
}
#if defined(UART4)
else if (USARTx == UART4)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
}
#endif /* UART4 */
#if defined(UART5)
else if (USARTx == UART5)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
}
#endif /* UART5 */
#if defined(USART6)
else if (USARTx == USART6)
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART6);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART6);
}
#endif /* USART6 */
#if defined(UART7)
else if (USARTx == UART7)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
}
#endif /* UART7 */
#if defined(UART8)
else if (USARTx == UART8)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
}
#endif /* UART8 */
#if defined(UART9)
else if (USARTx == UART9)
{
/* Force reset of UART clock */
LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_UART9);
/* Release reset of UART clock */
LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_UART9);
}
#endif /* UART9 */
#if defined(USART10)
else if (USARTx == USART10)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART10);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART10);
}
#endif /* USART10 */
#if defined(USART11)
else if (USARTx == USART11)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART11);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART11);
}
#endif /* USART11 */
#if defined(UART12)
else if (USARTx == UART12)
{
/* Force reset of UART clock */
LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_UART12);
/* Release reset of UART clock */
LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_UART12);
}
#endif /* UART12 */
else
{
status = ERROR;
}
return (status);
}
/**
* @brief Initialize USART registers according to the specified
* parameters in USART_InitStruct.
* @note As some bits in USART configuration registers can only be written when
* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
* this function. Otherwise, ERROR result will be returned.
* @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
* @param USARTx USART Instance
* @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
* that contains the configuration information for the specified USART peripheral.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers are initialized according to USART_InitStruct content
* - ERROR: Problem occurred during USART Registers initialization
*/
ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
{
ErrorStatus status = ERROR;
uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
/* Check the parameters */
assert_param(IS_UART_INSTANCE(USARTx));
assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
/* USART needs to be in disabled state, in order to be able to configure some bits in
CRx registers */
if (LL_USART_IsEnabled(USARTx) == 0U)
{
/*---------------------------- USART CR1 Configuration ---------------------
* Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
* - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
* - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
* - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
* - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
*/
MODIFY_REG(USARTx->CR1,
(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
(USART_InitStruct->DataWidth | USART_InitStruct->Parity |
USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
/*---------------------------- USART CR2 Configuration ---------------------
* Configure USARTx CR2 (Stop bits) with parameters:
* - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
* - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
*/
LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
/*---------------------------- USART CR3 Configuration ---------------------
* Configure USARTx CR3 (Hardware Flow Control) with parameters:
* - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
* USART_InitStruct->HardwareFlowControl value.
*/
LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
/*---------------------------- USART BRR Configuration ---------------------
* Retrieve Clock frequency used for USART Peripheral
*/
if (USARTx == USART1)
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
}
else if (USARTx == USART2)
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
}
else if (USARTx == USART3)
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
}
#if defined(UART4)
else if (USARTx == UART4)
{
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
}
#endif /* UART4 */
#if defined(UART5)
else if (USARTx == UART5)
{
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
}
#endif /* UART5 */
#if defined(USART6)
else if (USARTx == USART6)
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
}
#endif /* USART6 */
#if defined(UART7)
else if (USARTx == UART7)
{
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
}
#endif /* UART7 */
#if defined(UART8)
else if (USARTx == UART8)
{
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
}
#endif /* UART8 */
#if defined(UART9)
else if (USARTx == UART9)
{
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART9_CLKSOURCE);
}
#endif /* UART9 */
#if defined(USART10)
else if (USARTx == USART10)
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART10_CLKSOURCE);
}
#endif /* USART10 */
#if defined(USART11)
else if (USARTx == USART11)
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART11_CLKSOURCE);
}
#endif /* USART11 */
#if defined(UART12)
else if (USARTx == UART12)
{
periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART12_CLKSOURCE);
}
#endif /* UART12 */
else
{
/* Nothing to do, as error code is already assigned to ERROR value */
}
/* Configure the USART Baud Rate :
- prescaler value is required
- valid baud rate value (different from 0) is required
- Peripheral clock as returned by RCC service, should be valid (different from 0).
*/
if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
&& (USART_InitStruct->BaudRate != 0U))
{
status = SUCCESS;
LL_USART_SetBaudRate(USARTx,
periphclk,
USART_InitStruct->PrescalerValue,
USART_InitStruct->OverSampling,
USART_InitStruct->BaudRate);
/* Check BRR is greater than or equal to 16d */
assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
}
/*---------------------------- USART PRESC Configuration -----------------------
* Configure USARTx PRESC (Prescaler) with parameters:
* - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
*/
LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
}
/* Endif (=> USART not in Disabled state => return ERROR) */
return (status);
}
/**
* @brief Set each @ref LL_USART_InitTypeDef field to default value.
* @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
{
/* Set USART_InitStruct fields to default values */
USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
}
/**
* @brief Initialize USART Clock related settings according to the
* specified parameters in the USART_ClockInitStruct.
* @note As some bits in USART configuration registers can only be written when
* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
* this function. Otherwise, ERROR result will be returned.
* @param USARTx USART Instance
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
* that contains the Clock configuration information for the specified USART peripheral.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers related to Clock settings are initialized according
* to USART_ClockInitStruct content
* - ERROR: Problem occurred during USART Registers initialization
*/
ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
{
ErrorStatus status = SUCCESS;
/* Check USART Instance and Clock signal output parameters */
assert_param(IS_UART_INSTANCE(USARTx));
assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
/* USART needs to be in disabled state, in order to be able to configure some bits in
CRx registers */
if (LL_USART_IsEnabled(USARTx) == 0U)
{
/* Ensure USART instance is USART capable */
assert_param(IS_USART_INSTANCE(USARTx));
/* Check clock related parameters */
assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
/*---------------------------- USART CR2 Configuration -----------------------
* Configure USARTx CR2 (Clock signal related bits) with parameters:
* - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
* - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
* - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
* - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
*/
MODIFY_REG(USARTx->CR2,
USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
}
/* Else (USART not in Disabled state => return ERROR */
else
{
status = ERROR;
}
return (status);
}
/**
* @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
{
/* Set LL_USART_ClockInitStruct fields with default values */
USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
LL_USART_CLOCK_DISABLE */
USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
LL_USART_CLOCK_DISABLE */
USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
LL_USART_CLOCK_DISABLE */
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* USART1 || USART2 || USART3 || UART4 || UART5 || USART6
|| UART7 || UART8 || UART9 || USART10 || USART11 || UART12 */
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
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