I2S2 RX DMA

- I2S RX DMA enabled in CubeMX
- fixed CubeMX code (src+dest addr, len)
- added sound (8-bit signed samples)
- AudioTask: sound player with Fill_I2S_Buffer function

TODO: config DMA node src/dest/len after CubeMX code
master
unicod 2 weeks ago
parent f1eb62d3d4
commit 98a7d09f40

@ -52,6 +52,7 @@
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
LL_DMA_LinkNodeTypeDef Node_GPDMA2_Channel1;
LL_DMA_LinkNodeTypeDef Node_GPDMA2_Channel0; LL_DMA_LinkNodeTypeDef Node_GPDMA2_Channel0;
LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel3; LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel3;
@ -59,7 +60,10 @@ LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel1;
/* USER CODE BEGIN PV */ /* USER CODE BEGIN PV */
#define I2S2_RXDMA_BUF_SAMPLE_CNT 256
#define I2S2_TXDMA_BUF_SAMPLE_CNT 256 #define I2S2_TXDMA_BUF_SAMPLE_CNT 256
uint32_t I2S2RxDmaBuf[I2S2_RXDMA_BUF_SAMPLE_CNT][2] = {0};
uint32_t I2S2TxDmaBuf[I2S2_TXDMA_BUF_SAMPLE_CNT][2] = {0}; uint32_t I2S2TxDmaBuf[I2S2_TXDMA_BUF_SAMPLE_CNT][2] = {0};
/* USER CODE END PV */ /* USER CODE END PV */
@ -369,7 +373,11 @@ int main(void)
if (ch != -1) { // if data received if (ch != -1) { // if data received
char c = ch; char c = ch;
DispPutDigit(0, c, 0); DispPutDigit(0, c, 0);
if (c == 's') { if (c == 'a') {
printf("I2S RX buf:\n");
for (size_t i = 0; i < I2S2_RXDMA_BUF_SAMPLE_CNT; i++) {
printf("%d;%d\n", I2S2RxDmaBuf[i][0]/65536, I2S2RxDmaBuf[i][1]/65536);
}
} else if (c == ' ') { } else if (c == ' ') {
AudioRun = 1; AudioRun = 1;
sound_read_index = 0; sound_read_index = 0;
@ -613,9 +621,6 @@ static void MX_I2S2_Init(void)
// Remove the second redefinition of NodeConfig after Cube MX code generation. // Remove the second redefinition of NodeConfig after Cube MX code generation.
LL_DMA_InitNodeTypeDef NodeConfig = {0}; LL_DMA_InitNodeTypeDef NodeConfig = {0};
NodeConfig.SrcAddress = (uint32_t)&I2S2TxDmaBuf;
NodeConfig.DestAddress = (uint32_t)LL_SPI_DMA_GetTxRegAddr(SPI2);
NodeConfig.BlkDataLength = sizeof(I2S2TxDmaBuf);
/* USER CODE END I2S2_Init 0 */ /* USER CODE END I2S2_Init 0 */
@ -665,7 +670,52 @@ static void MX_I2S2_Init(void)
/* I2S2 DMA Init */ /* I2S2 DMA Init */
/* GPDMA2_REQUEST_SPI2_RX Init */
NodeConfig.SrcAddress = (uint32_t)LL_SPI_DMA_GetRxRegAddr(SPI2);
NodeConfig.DestAddress = (uint32_t)&I2S2RxDmaBuf;
NodeConfig.BlkDataLength = sizeof(I2S2RxDmaBuf);
NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT1;
NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE;
NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE;
NodeConfig.DestBurstLength = 1;
NodeConfig.DestIncMode = LL_DMA_DEST_INCREMENT;
NodeConfig.DestDataWidth = LL_DMA_DEST_DATAWIDTH_WORD;
NodeConfig.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT0;
NodeConfig.SrcByteExchange = LL_DMA_SRC_BYTE_PRESERVE;
NodeConfig.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD;
NodeConfig.SrcBurstLength = 1;
NodeConfig.SrcIncMode = LL_DMA_SRC_FIXED;
NodeConfig.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_WORD;
NodeConfig.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
NodeConfig.Mode = LL_DMA_NORMAL;
NodeConfig.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED;
NodeConfig.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST;
NodeConfig.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
NodeConfig.Request = LL_GPDMA2_REQUEST_SPI2_RX;
NodeConfig.UpdateRegisters = (LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 | LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CTR3 | LL_DMA_UPDATE_CBR2 | LL_DMA_UPDATE_CLLR);
NodeConfig.NodeType = LL_DMA_GPDMA_LINEAR_NODE;
LL_DMA_CreateLinkNode(&NodeConfig, &Node_GPDMA2_Channel1);
LL_DMA_ConnectLinkNode(&Node_GPDMA2_Channel1, LL_DMA_CLLR_OFFSET5, &Node_GPDMA2_Channel1, LL_DMA_CLLR_OFFSET5);
/* Next function call is commented because it will not compile as is. The Node structure address has to be cast to an unsigned int (uint32_t)pNode_DMAxCHy */
/*
*/
LL_DMA_SetLinkedListBaseAddr(GPDMA2, LL_DMA_CHANNEL_1, (uint32_t)&Node_GPDMA2_Channel1);
DMA_InitLinkedListStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT;
DMA_InitLinkedListStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION;
DMA_InitLinkedListStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1;
DMA_InitLinkedListStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
LL_DMA_List_Init(GPDMA2, LL_DMA_CHANNEL_1, &DMA_InitLinkedListStruct);
/* GPDMA2_REQUEST_SPI2_TX Init */ /* GPDMA2_REQUEST_SPI2_TX Init */
NodeConfig.SrcAddress = (uint32_t)&I2S2TxDmaBuf;
NodeConfig.DestAddress = (uint32_t)LL_SPI_DMA_GetTxRegAddr(SPI2);
NodeConfig.BlkDataLength = sizeof(I2S2TxDmaBuf);
NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0; NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0;
NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE; NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE;
NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE; NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE;
@ -704,6 +754,11 @@ static void MX_I2S2_Init(void)
/* USER CODE BEGIN I2S2_Init 1 */ /* USER CODE BEGIN I2S2_Init 1 */
LL_DMA_ConfigLinkUpdate(GPDMA2, LL_DMA_CHANNEL_1, LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 |LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR, (uint32_t)&Node_GPDMA2_Channel1);
LL_DMA_EnableChannel(GPDMA2, LL_DMA_CHANNEL_1);
LL_DMA_SetLinkedListAddrOffset(GPDMA2, LL_DMA_CHANNEL_1, LL_DMA_CLLR_OFFSET5);
LL_I2S_EnableDMAReq_RX(SPI2);
LL_DMA_ConfigLinkUpdate(GPDMA2, LL_DMA_CHANNEL_0, LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 |LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR, (uint32_t)&Node_GPDMA2_Channel0); LL_DMA_ConfigLinkUpdate(GPDMA2, LL_DMA_CHANNEL_0, LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 |LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR, (uint32_t)&Node_GPDMA2_Channel0);
LL_DMA_EnableChannel(GPDMA2, LL_DMA_CHANNEL_0); LL_DMA_EnableChannel(GPDMA2, LL_DMA_CHANNEL_0);
LL_DMA_SetLinkedListAddrOffset(GPDMA2, LL_DMA_CHANNEL_0, LL_DMA_CLLR_OFFSET5); LL_DMA_SetLinkedListAddrOffset(GPDMA2, LL_DMA_CHANNEL_0, LL_DMA_CLLR_OFFSET5);

@ -33,14 +33,22 @@ GPDMA1.TRANSFERALLOCATEDPORTSRC_GPDMACH1=DMA_SRC_ALLOCATED_PORT0
GPDMA1.TRANSFERALLOCATEDPORTSRC_GPDMACH2=DMA_SRC_ALLOCATED_PORT1 GPDMA1.TRANSFERALLOCATEDPORTSRC_GPDMACH2=DMA_SRC_ALLOCATED_PORT1
GPDMA1.TRANSFEREVENTMODE_LL_CIRCULAR_GPDMACH1=DMA_TCEM_BLOCK_TRANSFER GPDMA1.TRANSFEREVENTMODE_LL_CIRCULAR_GPDMACH1=DMA_TCEM_BLOCK_TRANSFER
GPDMA2.CIRCULARMODE_GPDMACH0=ENABLE GPDMA2.CIRCULARMODE_GPDMACH0=ENABLE
GPDMA2.CIRCULARMODE_GPDMACH1=ENABLE
GPDMA2.DESTDATAWIDTH_GPDMACH0=DMA_DEST_DATAWIDTH_WORD GPDMA2.DESTDATAWIDTH_GPDMACH0=DMA_DEST_DATAWIDTH_WORD
GPDMA2.DESTDATAWIDTH_GPDMACH1=DMA_DEST_DATAWIDTH_WORD
GPDMA2.DESTINC_GPDMACH1=DMA_DINC_INCREMENTED
GPDMA2.DIRECTION_GPDMACH0=DMA_MEMORY_TO_PERIPH GPDMA2.DIRECTION_GPDMACH0=DMA_MEMORY_TO_PERIPH
GPDMA2.IPHANDLE_GPDMACH0-SIMPLEREQUEST_GPDMACH0=__NULL GPDMA2.IPHANDLE_GPDMACH0-SIMPLEREQUEST_GPDMACH0=__NULL
GPDMA2.IPParameters=CIRCULARMODE_GPDMACH0,LINKALLOCATEDPORT_CIRCULAR_GPDMACH0,IPHANDLE_GPDMACH0-SIMPLEREQUEST_GPDMACH0,REQUEST_GPDMACH0,DIRECTION_GPDMACH0,SRCINC_GPDMACH0,SRCDATAWIDTH_GPDMACH0,TRANSFERALLOCATEDPORTSRC_GPDMACH0,DESTDATAWIDTH_GPDMACH0 GPDMA2.IPHANDLE_GPDMACH1-SIMPLEREQUEST_GPDMACH1=__NULL
GPDMA2.IPParameters=CIRCULARMODE_GPDMACH0,LINKALLOCATEDPORT_CIRCULAR_GPDMACH0,REQUEST_GPDMACH0,DIRECTION_GPDMACH0,SRCINC_GPDMACH0,SRCDATAWIDTH_GPDMACH0,TRANSFERALLOCATEDPORTSRC_GPDMACH0,DESTDATAWIDTH_GPDMACH0,IPHANDLE_GPDMACH0-SIMPLEREQUEST_GPDMACH0,CIRCULARMODE_GPDMACH1,LINKALLOCATEDPORT_CIRCULAR_GPDMACH1,IPHANDLE_GPDMACH1-SIMPLEREQUEST_GPDMACH1,REQUEST_GPDMACH1,SRCDATAWIDTH_GPDMACH1,DESTDATAWIDTH_GPDMACH1,TRANSFERALLOCATEDPORTDEST_GPDMACH1,DESTINC_GPDMACH1
GPDMA2.LINKALLOCATEDPORT_CIRCULAR_GPDMACH0=DMA_LINK_ALLOCATED_PORT1 GPDMA2.LINKALLOCATEDPORT_CIRCULAR_GPDMACH0=DMA_LINK_ALLOCATED_PORT1
GPDMA2.LINKALLOCATEDPORT_CIRCULAR_GPDMACH1=DMA_LINK_ALLOCATED_PORT1
GPDMA2.REQUEST_GPDMACH0=GPDMA2_REQUEST_SPI2_TX GPDMA2.REQUEST_GPDMACH0=GPDMA2_REQUEST_SPI2_TX
GPDMA2.REQUEST_GPDMACH1=GPDMA2_REQUEST_SPI2_RX
GPDMA2.SRCDATAWIDTH_GPDMACH0=DMA_SRC_DATAWIDTH_WORD GPDMA2.SRCDATAWIDTH_GPDMACH0=DMA_SRC_DATAWIDTH_WORD
GPDMA2.SRCDATAWIDTH_GPDMACH1=DMA_SRC_DATAWIDTH_WORD
GPDMA2.SRCINC_GPDMACH0=DMA_SINC_INCREMENTED GPDMA2.SRCINC_GPDMACH0=DMA_SINC_INCREMENTED
GPDMA2.TRANSFERALLOCATEDPORTDEST_GPDMACH1=DMA_DEST_ALLOCATED_PORT1
GPDMA2.TRANSFERALLOCATEDPORTSRC_GPDMACH0=DMA_SRC_ALLOCATED_PORT1 GPDMA2.TRANSFERALLOCATEDPORTSRC_GPDMACH0=DMA_SRC_ALLOCATED_PORT1
GPIO.groupedBy=Group By Peripherals GPIO.groupedBy=Group By Peripherals
I2C1.IPParameters=Timing I2C1.IPParameters=Timing
@ -146,21 +154,22 @@ Mcu.Pin31=VP_GPDMA1_VS_GPDMACH1
Mcu.Pin32=VP_GPDMA1_VS_GPDMACH2 Mcu.Pin32=VP_GPDMA1_VS_GPDMACH2
Mcu.Pin33=VP_GPDMA1_VS_GPDMACH3 Mcu.Pin33=VP_GPDMA1_VS_GPDMACH3
Mcu.Pin34=VP_GPDMA2_VS_GPDMACH0 Mcu.Pin34=VP_GPDMA2_VS_GPDMACH0
Mcu.Pin35=VP_ICACHE_VS_ICACHE Mcu.Pin35=VP_GPDMA2_VS_GPDMACH1
Mcu.Pin36=VP_PWR_VS_SECSignals Mcu.Pin36=VP_ICACHE_VS_ICACHE
Mcu.Pin37=VP_PWR_VS_LPOM Mcu.Pin37=VP_PWR_VS_SECSignals
Mcu.Pin38=VP_SYS_VS_Systick Mcu.Pin38=VP_PWR_VS_LPOM
Mcu.Pin39=VP_TIM2_VS_ClockSourceINT Mcu.Pin39=VP_SYS_VS_Systick
Mcu.Pin4=PC2 Mcu.Pin4=PC2
Mcu.Pin40=VP_TIM5_VS_ClockSourceINT Mcu.Pin40=VP_TIM2_VS_ClockSourceINT
Mcu.Pin41=VP_BOOTPATH_VS_BOOTPATH Mcu.Pin41=VP_TIM5_VS_ClockSourceINT
Mcu.Pin42=VP_MEMORYMAP_VS_MEMORYMAP Mcu.Pin42=VP_BOOTPATH_VS_BOOTPATH
Mcu.Pin43=VP_MEMORYMAP_VS_MEMORYMAP
Mcu.Pin5=PA0 Mcu.Pin5=PA0
Mcu.Pin6=PA1 Mcu.Pin6=PA1
Mcu.Pin7=PA2 Mcu.Pin7=PA2
Mcu.Pin8=PA3 Mcu.Pin8=PA3
Mcu.Pin9=PB1 Mcu.Pin9=PB1
Mcu.PinsNb=43 Mcu.PinsNb=44
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32H533RETx Mcu.UserName=STM32H533RETx
@ -460,6 +469,8 @@ VP_GPDMA1_VS_GPDMACH3.Mode=SIMPLEREQUEST_GPDMACH3
VP_GPDMA1_VS_GPDMACH3.Signal=GPDMA1_VS_GPDMACH3 VP_GPDMA1_VS_GPDMACH3.Signal=GPDMA1_VS_GPDMACH3
VP_GPDMA2_VS_GPDMACH0.Mode=SIMPLEREQUEST_GPDMACH0 VP_GPDMA2_VS_GPDMACH0.Mode=SIMPLEREQUEST_GPDMACH0
VP_GPDMA2_VS_GPDMACH0.Signal=GPDMA2_VS_GPDMACH0 VP_GPDMA2_VS_GPDMACH0.Signal=GPDMA2_VS_GPDMACH0
VP_GPDMA2_VS_GPDMACH1.Mode=SIMPLEREQUEST_GPDMACH1
VP_GPDMA2_VS_GPDMACH1.Signal=GPDMA2_VS_GPDMACH1
VP_ICACHE_VS_ICACHE.Mode=DefaultMode VP_ICACHE_VS_ICACHE.Mode=DefaultMode
VP_ICACHE_VS_ICACHE.Signal=ICACHE_VS_ICACHE VP_ICACHE_VS_ICACHE.Signal=ICACHE_VS_ICACHE
VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg

Loading…
Cancel
Save