@ -50,11 +50,15 @@
/* Private variables ---------------------------------------------------------*/
LL_DMA_LinkNodeTypeDef Node_GPDMA2_Channel0 ;
LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel3 ;
LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel1 ;
/* USER CODE BEGIN PV */
# define I2S2_TXDMA_BUF_SAMPLE_CNT 256
uint32_t I2S2TxDmaBuf [ I2S2_TXDMA_BUF_SAMPLE_CNT ] [ 2 ] = { 0 } ;
/* USER CODE END PV */
@ -63,6 +67,7 @@ void SystemClock_Config(void);
void PeriphCommonClock_Config ( void ) ;
static void MX_GPIO_Init ( void ) ;
static void MX_GPDMA1_Init ( void ) ;
static void MX_GPDMA2_Init ( void ) ;
static void MX_ICACHE_Init ( void ) ;
static void MX_TIM5_Init ( void ) ;
static void MX_TIM2_Init ( void ) ;
@ -157,11 +162,19 @@ int main(void)
/* USER CODE BEGIN SysInit */
for ( uint32_t i = 0 ; i < I2S2_TXDMA_BUF_SAMPLE_CNT ; i + + ) {
int32_t a = INT32_MAX / 2 * sin ( 2 * 3.14159265358979323846 * i / I2S2_TXDMA_BUF_SAMPLE_CNT ) ; // sine wave
int32_t b = INT32_MAX / 2 * sin ( 4 * 3.14159265358979323846 * i / I2S2_TXDMA_BUF_SAMPLE_CNT ) ; // sine wave at 2x frequency
I2S2TxDmaBuf [ i ] [ 0 ] = a ; // left channel sample
I2S2TxDmaBuf [ i ] [ 1 ] = b ; // right channel sample
}
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init ( ) ;
MX_GPDMA1_Init ( ) ;
MX_GPDMA2_Init ( ) ;
MX_ICACHE_Init ( ) ;
MX_TIM5_Init ( ) ;
MX_TIM2_Init ( ) ;
@ -230,13 +243,6 @@ int main(void)
Usart2_DMA_Task ( ) ; // handle USART2 DMA rx/tx
Usart3_DMA_Task ( ) ; // handle USART3 DMA rx/tx
// I2S2 testing
if ( LL_I2S_IsActiveFlag_TXP ( SPI2 ) ) { // if I2S2 TX buffer is empty
static uint32_t sample = 0x12345678 ; // example sample value
LL_I2S_TransmitData32 ( SPI2 , sample ) ;
sample + + ;
}
/* USER CODE END WHILE */
@ -370,6 +376,33 @@ static void MX_GPDMA1_Init(void)
}
/**
* @ brief GPDMA2 Initialization Function
* @ param None
* @ retval None
*/
static void MX_GPDMA2_Init ( void )
{
/* USER CODE BEGIN GPDMA2_Init 0 */
/* USER CODE END GPDMA2_Init 0 */
/* Peripheral clock enable */
LL_AHB1_GRP1_EnableClock ( LL_AHB1_GRP1_PERIPH_GPDMA2 ) ;
/* GPDMA2 interrupt Init */
NVIC_SetPriority ( GPDMA2_Channel0_IRQn , NVIC_EncodePriority ( NVIC_GetPriorityGrouping ( ) , 0 , 0 ) ) ;
/* USER CODE BEGIN GPDMA2_Init 1 */
/* USER CODE END GPDMA2_Init 1 */
/* USER CODE BEGIN GPDMA2_Init 2 */
/* USER CODE END GPDMA2_Init 2 */
}
/**
* @ brief I2S2 Initialization Function
* @ param None
@ -380,11 +413,21 @@ static void MX_I2S2_Init(void)
/* USER CODE BEGIN I2S2_Init 0 */
// WARNING
// Remove the second redefinition of NodeConfig after Cube MX code generation.
LL_DMA_InitNodeTypeDef NodeConfig = { 0 } ;
NodeConfig . SrcAddress = ( uint32_t ) & I2S2TxDmaBuf ;
NodeConfig . DestAddress = ( uint32_t ) LL_SPI_DMA_GetTxRegAddr ( SPI2 ) ;
NodeConfig . BlkDataLength = sizeof ( I2S2TxDmaBuf ) ;
/* USER CODE END I2S2_Init 0 */
LL_I2S_InitTypeDef I2S_InitStruct = { 0 } ;
LL_GPIO_InitTypeDef GPIO_InitStruct = { 0 } ;
LL_DMA_InitLinkedListTypeDef DMA_InitLinkedListStruct = { 0 } ;
LL_RCC_SetSPIClockSource ( LL_RCC_SPI2_CLKSOURCE_PLL2P ) ;
@ -415,8 +458,53 @@ static void MX_I2S2_Init(void)
GPIO_InitStruct . Alternate = LL_GPIO_AF_5 ;
LL_GPIO_Init ( GPIOB , & GPIO_InitStruct ) ;
/* I2S2 DMA Init */
/* GPDMA2_REQUEST_SPI2_TX Init */
NodeConfig . DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0 ;
NodeConfig . DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE ;
NodeConfig . DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE ;
NodeConfig . DestBurstLength = 1 ;
NodeConfig . DestIncMode = LL_DMA_DEST_FIXED ;
NodeConfig . DestDataWidth = LL_DMA_DEST_DATAWIDTH_WORD ;
NodeConfig . SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT1 ;
NodeConfig . SrcByteExchange = LL_DMA_SRC_BYTE_PRESERVE ;
NodeConfig . DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD ;
NodeConfig . SrcBurstLength = 1 ;
NodeConfig . SrcIncMode = LL_DMA_SRC_INCREMENT ;
NodeConfig . SrcDataWidth = LL_DMA_SRC_DATAWIDTH_WORD ;
NodeConfig . TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER ;
NodeConfig . Mode = LL_DMA_NORMAL ;
NodeConfig . TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED ;
NodeConfig . BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST ;
NodeConfig . Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH ;
NodeConfig . Request = LL_GPDMA2_REQUEST_SPI2_TX ;
NodeConfig . UpdateRegisters = ( LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 | LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CTR3 | LL_DMA_UPDATE_CBR2 | LL_DMA_UPDATE_CLLR ) ;
NodeConfig . NodeType = LL_DMA_GPDMA_LINEAR_NODE ;
LL_DMA_CreateLinkNode ( & NodeConfig , & Node_GPDMA2_Channel0 ) ;
LL_DMA_ConnectLinkNode ( & Node_GPDMA2_Channel0 , LL_DMA_CLLR_OFFSET5 , & Node_GPDMA2_Channel0 , LL_DMA_CLLR_OFFSET5 ) ;
/* Next function call is commented because it will not compile as is. The Node structure address has to be cast to an unsigned int (uint32_t)pNode_DMAxCHy */
/*
*/
LL_DMA_SetLinkedListBaseAddr ( GPDMA2 , LL_DMA_CHANNEL_0 , ( uint32_t ) & Node_GPDMA2_Channel0 ) ;
DMA_InitLinkedListStruct . Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT ;
DMA_InitLinkedListStruct . LinkStepMode = LL_DMA_LSM_FULL_EXECUTION ;
DMA_InitLinkedListStruct . LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1 ;
DMA_InitLinkedListStruct . TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER ;
LL_DMA_List_Init ( GPDMA2 , LL_DMA_CHANNEL_0 , & DMA_InitLinkedListStruct ) ;
/* USER CODE BEGIN I2S2_Init 1 */
LL_DMA_ConfigLinkUpdate ( GPDMA2 , LL_DMA_CHANNEL_0 , LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 | LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR , ( uint32_t ) & Node_GPDMA2_Channel0 ) ;
LL_DMA_EnableChannel ( GPDMA2 , LL_DMA_CHANNEL_0 ) ;
LL_DMA_SetLinkedListAddrOffset ( GPDMA2 , LL_DMA_CHANNEL_0 , LL_DMA_CLLR_OFFSET5 ) ;
LL_I2S_EnableDMAReq_TX ( SPI2 ) ;
/* USER CODE END I2S2_Init 1 */
I2S_InitStruct . Mode = LL_I2S_MODE_MASTER_FULL_DUPLEX ;
I2S_InitStruct . Standard = LL_I2S_STANDARD_PHILIPS ;
