TIM2: time base for scheduler with [0.5ms] resolution

- TickChk with [1ms] resolution
- 1ms period is not possible at 80MHz with 16 bit counter, only 0.5ms
master
unicod 1 month ago
parent 705a5221df
commit 037f2d3b94

@ -51,6 +51,7 @@ void SystemClock_Config(void);
static void MX_GPIO_Init(void); static void MX_GPIO_Init(void);
static void MX_ICACHE_Init(void); static void MX_ICACHE_Init(void);
static void MX_TIM5_Init(void); static void MX_TIM5_Init(void);
static void MX_TIM2_Init(void);
/* USER CODE BEGIN PFP */ /* USER CODE BEGIN PFP */
/* USER CODE END PFP */ /* USER CODE END PFP */
@ -61,6 +62,22 @@ static inline void LD2_On() { LL_GPIO_SetOutputPin( LD2_GPIO_Port, LD2_Pin);
static inline void LD2_Off() { LL_GPIO_ResetOutputPin( LD2_GPIO_Port, LD2_Pin); } static inline void LD2_Off() { LL_GPIO_ResetOutputPin( LD2_GPIO_Port, LD2_Pin); }
static inline void LD2_Toggle() { LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); } static inline void LD2_Toggle() { LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); }
/***************************************************************************//**
* @brief Check if specified time interval has elapsed
* @param tref Pointer to time reference variable [ms]
* @param tcycle Time interval in milliseconds
*//****************************************************************************/
static inline uint32_t TickChk(uint32_t *tref, int_fast16_t tcycle) {
uint32_t t = LL_TIM_GetCounter(TIM2) / 2; // 2kHz/2=1kHz
int32_t tdif = t - *tref;
if (tdif >= tcycle) {
*tref += tcycle;
return 1;
}
return 0;
}
/* USER CODE END 0 */ /* USER CODE END 0 */
@ -100,7 +117,10 @@ int main(void)
MX_GPIO_Init(); MX_GPIO_Init();
MX_ICACHE_Init(); MX_ICACHE_Init();
MX_TIM5_Init(); MX_TIM5_Init();
MX_TIM2_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
LL_TIM_GenerateEvent_UPDATE(TIM2);
LL_TIM_EnableCounter(TIM2);
LL_TIM_GenerateEvent_UPDATE(TIM5); LL_TIM_GenerateEvent_UPDATE(TIM5);
LL_TIM_EnableCounter(TIM5); LL_TIM_EnableCounter(TIM5);
@ -118,15 +138,27 @@ int main(void)
/* USER CODE BEGIN WHILE */ /* USER CODE BEGIN WHILE */
while (1) while (1)
{ {
static uint32_t Tick10msRef = 0;
if (TickChk(&Tick10msRef, 10)) { // execute every 10ms
ShiftReg_Update();
}
static uint32_t Tick1secRef = 0;
if (TickChk(&Tick1secRef, 1000)) { // execute every 1s
LD2_Toggle(); LD2_Toggle();
Delay_us(1000000); // 1s delay
static uint8_t cnt = 0; static uint8_t cnt = 0;
DispPutDigit(0, '0'+cnt, 0); DispPutDigit(0, '0'+cnt, 0);
DispPutDigit(1, 'a'+cnt, 1); DispPutDigit(1, 'a'+cnt, 1);
DispPutDigit(2, 'A'+cnt, 0); DispPutDigit(2, 'A'+cnt, 0);
DispPutDigit(3, 'Z'-cnt, 1); cnt = (cnt + 1) % 16;
if (++cnt > 9) cnt = 0; }
ShiftReg_Update();
static uint32_t Tick100msRef = 0;
if (TickChk(&Tick100msRef, 100)) { // execute every 100ms
static uint8_t dot = 0;
dot ^= 1; // toggle dot
DispPutDigit(3, ' ', dot);
}
/* USER CODE END WHILE */ /* USER CODE END WHILE */
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
@ -214,6 +246,41 @@ static void MX_ICACHE_Init(void)
} }
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
LL_TIM_InitTypeDef TIM_InitStruct = {0};
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
TIM_InitStruct.Prescaler = 39999;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = 4294967295;
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
LL_TIM_Init(TIM2, &TIM_InitStruct);
LL_TIM_DisableARRPreload(TIM2);
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
LL_TIM_DisableMasterSlaveMode(TIM2);
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
}
/** /**
* @brief TIM5 Initialization Function * @brief TIM5 Initialization Function
* @param None * @param None

@ -46,6 +46,7 @@ Mcu.ContextProject=TrustZoneDisabled
Mcu.Family=STM32H5 Mcu.Family=STM32H5
Mcu.IP0=BOOTPATH Mcu.IP0=BOOTPATH
Mcu.IP1=CORTEX_M33_NS Mcu.IP1=CORTEX_M33_NS
Mcu.IP10=TIM5
Mcu.IP2=DEBUG Mcu.IP2=DEBUG
Mcu.IP3=ICACHE Mcu.IP3=ICACHE
Mcu.IP4=MEMORYMAP Mcu.IP4=MEMORYMAP
@ -53,8 +54,8 @@ Mcu.IP5=NVIC
Mcu.IP6=PWR Mcu.IP6=PWR
Mcu.IP7=RCC Mcu.IP7=RCC
Mcu.IP8=SYS Mcu.IP8=SYS
Mcu.IP9=TIM5 Mcu.IP9=TIM2
Mcu.IPNb=10 Mcu.IPNb=11
Mcu.Name=STM32H533RETx Mcu.Name=STM32H533RETx
Mcu.Package=LQFP64 Mcu.Package=LQFP64
Mcu.Pin0=PC14-OSC32_IN(OSC32_IN) Mcu.Pin0=PC14-OSC32_IN(OSC32_IN)
@ -62,9 +63,10 @@ Mcu.Pin1=PC15-OSC32_OUT(OSC32_OUT)
Mcu.Pin10=VP_PWR_VS_SECSignals Mcu.Pin10=VP_PWR_VS_SECSignals
Mcu.Pin11=VP_PWR_VS_LPOM Mcu.Pin11=VP_PWR_VS_LPOM
Mcu.Pin12=VP_SYS_VS_Systick Mcu.Pin12=VP_SYS_VS_Systick
Mcu.Pin13=VP_TIM5_VS_ClockSourceINT Mcu.Pin13=VP_TIM2_VS_ClockSourceINT
Mcu.Pin14=VP_BOOTPATH_VS_BOOTPATH Mcu.Pin14=VP_TIM5_VS_ClockSourceINT
Mcu.Pin15=VP_MEMORYMAP_VS_MEMORYMAP Mcu.Pin15=VP_BOOTPATH_VS_BOOTPATH
Mcu.Pin16=VP_MEMORYMAP_VS_MEMORYMAP
Mcu.Pin2=PH0-OSC_IN(PH0) Mcu.Pin2=PH0-OSC_IN(PH0)
Mcu.Pin3=PH1-OSC_OUT(PH1) Mcu.Pin3=PH1-OSC_OUT(PH1)
Mcu.Pin4=PA13(JTMS/SWDIO) Mcu.Pin4=PA13(JTMS/SWDIO)
@ -73,7 +75,7 @@ Mcu.Pin6=PC11
Mcu.Pin7=PB8 Mcu.Pin7=PB8
Mcu.Pin8=VP_CORTEX_M33_NS_VS_Hclk Mcu.Pin8=VP_CORTEX_M33_NS_VS_Hclk
Mcu.Pin9=VP_ICACHE_VS_ICACHE Mcu.Pin9=VP_ICACHE_VS_ICACHE
Mcu.PinsNb=16 Mcu.PinsNb=17
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32H533RETx Mcu.UserName=STM32H533RETx
@ -155,7 +157,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath= ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=true ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_ICACHE_Init-ICACHE-false-LL-true,4-MX_TIM5_Init-TIM5-false-LL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-LL-true,0-MX_PWR_Init-PWR-false-LL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_ICACHE_Init-ICACHE-false-LL-true,4-MX_TIM5_Init-TIM5-false-LL-true,5-MX_TIM2_Init-TIM2-false-LL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-LL-true,0-MX_PWR_Init-PWR-false-LL-true
RCC.ADCFreq_Value=80000000 RCC.ADCFreq_Value=80000000
RCC.AHBFreq_Value=80000000 RCC.AHBFreq_Value=80000000
RCC.APB1Freq_Value=80000000 RCC.APB1Freq_Value=80000000
@ -231,6 +233,8 @@ RCC.VCOInputFreq_Value=16000000
RCC.VCOOutputFreq_Value=320000000 RCC.VCOOutputFreq_Value=320000000
RCC.VCOPLL2OutputFreq_Value=160000000 RCC.VCOPLL2OutputFreq_Value=160000000
RCC.VCOPLL3OutputFreq_Value=64000000 RCC.VCOPLL3OutputFreq_Value=64000000
TIM2.IPParameters=Prescaler
TIM2.Prescaler=39999
TIM5.IPParameters=Prescaler TIM5.IPParameters=Prescaler
TIM5.Prescaler=79 TIM5.Prescaler=79
VP_BOOTPATH_VS_BOOTPATH.Mode=BP_Activate VP_BOOTPATH_VS_BOOTPATH.Mode=BP_Activate
@ -247,6 +251,8 @@ VP_PWR_VS_SECSignals.Mode=Security/Privilege
VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals
VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM2_VS_ClockSourceINT.Mode=Internal
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
VP_TIM5_VS_ClockSourceINT.Mode=Internal VP_TIM5_VS_ClockSourceINT.Mode=Internal
VP_TIM5_VS_ClockSourceINT.Signal=TIM5_VS_ClockSourceINT VP_TIM5_VS_ClockSourceINT.Signal=TIM5_VS_ClockSourceINT
board=custom board=custom

Loading…
Cancel
Save