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1144 lines
36 KiB
C
1144 lines
36 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file : main.c
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* @brief : Main program body
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include <stdint.h>
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#include <string.h>
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#include "disp7seg.h"
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#include "printf.h"
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#include "usart2_dma.h"
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#include "usart3_dma.h"
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#include "uart5_it.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN PTD */
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/* USER CODE END PTD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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#define ARRAY_COUNT(arr) (sizeof(arr) / sizeof((arr)[0]))
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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LL_DMA_LinkNodeTypeDef Node_GPDMA2_Channel0;
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LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel3;
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LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel1;
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/* USER CODE BEGIN PV */
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#define I2S2_TXDMA_BUF_SAMPLE_CNT 256
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uint32_t I2S2TxDmaBuf[I2S2_TXDMA_BUF_SAMPLE_CNT][2] = {0};
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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void PeriphCommonClock_Config(void);
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static void MX_GPIO_Init(void);
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static void MX_GPDMA1_Init(void);
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static void MX_GPDMA2_Init(void);
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static void MX_ICACHE_Init(void);
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static void MX_TIM5_Init(void);
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static void MX_TIM2_Init(void);
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static void MX_USART3_UART_Init(void);
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static void MX_UART5_Init(void);
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static void MX_USART2_UART_Init(void);
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static void MX_I2S2_Init(void);
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static void MX_I2C1_Init(void);
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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static inline void LD2_On() { LL_GPIO_SetOutputPin( LD2_GPIO_Port, LD2_Pin); }
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static inline void LD2_Off() { LL_GPIO_ResetOutputPin( LD2_GPIO_Port, LD2_Pin); }
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static inline void LD2_Toggle() { LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); }
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/***************************************************************************//**
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* @brief Check if specified time interval has elapsed
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* @param tref Pointer to time reference variable [ms]
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* @param tcycle Time interval in milliseconds
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*//****************************************************************************/
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static inline uint32_t TickChk(uint32_t *tref, int_fast16_t tcycle) {
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uint32_t t = LL_TIM_GetCounter(TIM2) / 2; // 2kHz/2=1kHz
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int32_t tdif = t - *tref;
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if (tdif >= tcycle) {
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*tref += tcycle;
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return 1;
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}
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return 0;
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}
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/***************************************************************************//**
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* @brief Character send interface for printf function
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*//****************************************************************************/
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void uart_putc (void* p, char c) {
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Uart5_PutByte(c);
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}
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void ProcessUsart2RxData(const uint8_t* data, uint16_t len) {
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#if 0
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printf("USART2 RX(%u): ", len);
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for (uint16_t i = 0; i < len; i++) {
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printf("%c", data[i]);
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}
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printf("\n");
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Delay_us(500); // simulate long processing time
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#endif
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}
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void ProcessUsart3RxData(const uint8_t* data, uint16_t len) {
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#if 0
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printf("USART3 RX(%u): ", len);
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for (uint16_t i = 0; i < len; i++) {
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printf("%c", data[i]);
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}
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printf("\n");
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Delay_us(500); // simulate long processing time
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#endif
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}
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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/* System interrupt init*/
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NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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/* SysTick_IRQn interrupt configuration */
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NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0));
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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/* Configure the peripherals common clocks */
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PeriphCommonClock_Config();
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/* USER CODE BEGIN SysInit */
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for (uint32_t i = 0; i < I2S2_TXDMA_BUF_SAMPLE_CNT; i++) {
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int32_t a = INT32_MAX / 2 * sin(2 * 3.14159265358979323846 * i / I2S2_TXDMA_BUF_SAMPLE_CNT); // sine wave
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int32_t b = INT32_MAX / 2 * sin(4 * 3.14159265358979323846 * i / I2S2_TXDMA_BUF_SAMPLE_CNT); // sine wave at 2x frequency
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I2S2TxDmaBuf[i][0] = a; // left channel sample
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I2S2TxDmaBuf[i][1] = b; // right channel sample
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}
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_GPDMA1_Init();
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MX_GPDMA2_Init();
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MX_ICACHE_Init();
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MX_TIM5_Init();
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MX_TIM2_Init();
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MX_USART3_UART_Init();
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MX_UART5_Init();
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MX_USART2_UART_Init();
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MX_I2S2_Init();
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MX_I2C1_Init();
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/* USER CODE BEGIN 2 */
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CODEC_RST_LO(); // Reset the audio codec via HW reset pin
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__NOP();
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__NOP();
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CODEC_RST_HI();
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init_printf(NULL, &uart_putc);
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LL_TIM_GenerateEvent_UPDATE(TIM2);
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LL_TIM_EnableCounter(TIM2);
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LL_TIM_GenerateEvent_UPDATE(TIM5);
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LL_TIM_EnableCounter(TIM5);
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LL_Init1msTick(SystemCoreClock);
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DispPutDigit(0, ' ', 0);
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DispPutDigit(1, ' ', 0);
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DispPutDigit(2, ' ', 0);
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DispPutDigit(3, ' ', 0);
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ShiftReg_Update();
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Usart2_DMA_Init(ProcessUsart2RxData);
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Usart3_DMA_Init(ProcessUsart3RxData);
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Uart5_Init();
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printf("Hello printf\n");
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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{
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static uint32_t Tick10msRef = 0;
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if (TickChk(&Tick10msRef, 10)) { // execute every 10ms
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ShiftReg_Update();
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}
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static uint32_t Tick1secRef = 0;
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if (TickChk(&Tick1secRef, 1000)) { // execute every 1s
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LD2_Toggle();
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static uint8_t cnt = 0;
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DispPutDigit(2, 'A'+cnt, 0);
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cnt = (cnt + 1) % 16;
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char s[256];
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sprintf(s, "%u: Hello DMA World! This is a long message to test the double buffering mechanism of USART3 Tx DMA.\n", cnt);
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Usart3_TxBufWrite(s, strlen(s), cnt&0x04); // write data and request flush
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sprintf(s, "%u: Message from USART2 DMA.\n", cnt);
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Usart2_TxBufWrite(s, strlen(s), !(cnt&0x04));
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}
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static uint32_t Tick100msRef = 0;
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if (TickChk(&Tick100msRef, 100)) { // execute every 100ms
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static uint8_t dot = 0;
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dot ^= 1; // toggle dot
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DispPutDigit(3, ' ', dot);
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}
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int16_t ch = Uart5_GetByte();
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if (ch != -1) { // if data received
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char c = ch;
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DispPutDigit(0, c, 0);
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}
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Usart2_DMA_Task(); // handle USART2 DMA rx/tx
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Usart3_DMA_Task(); // handle USART3 DMA rx/tx
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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}
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/* USER CODE END 3 */
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}
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_3);
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while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3)
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{
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}
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LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE3);
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while (LL_PWR_IsActiveFlag_VOS() == 0)
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{
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}
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LL_RCC_HSE_Enable();
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/* Wait till HSE is ready */
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while(LL_RCC_HSE_IsReady() != 1)
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{
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}
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LL_RCC_PLL1_SetSource(LL_RCC_PLL1SOURCE_HSE);
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LL_RCC_PLL1_SetVCOInputRange(LL_RCC_PLLINPUTRANGE_8_16);
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LL_RCC_PLL1_SetVCOOutputRange(LL_RCC_PLLVCORANGE_WIDE);
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LL_RCC_PLL1_SetM(1);
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LL_RCC_PLL1_SetN(20);
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LL_RCC_PLL1_SetP(4);
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LL_RCC_PLL1_SetQ(10);
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LL_RCC_PLL1_SetR(2);
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LL_RCC_PLL1P_Enable();
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LL_RCC_PLL1_Enable();
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/* Wait till PLL is ready */
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while(LL_RCC_PLL1_IsReady() != 1)
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{
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}
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL1);
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/* Wait till System clock is ready */
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL1)
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{
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}
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
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LL_RCC_SetAPB3Prescaler(LL_RCC_APB3_DIV_1);
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LL_Init1msTick(80000000);
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LL_SetSystemCoreClock(80000000);
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}
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/**
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* @brief Peripherals Common Clock Configuration
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* @retval None
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*/
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void PeriphCommonClock_Config(void)
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{
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LL_RCC_PLL2_SetSource(LL_RCC_PLL2SOURCE_HSE);
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LL_RCC_PLL2_SetVCOInputRange(LL_RCC_PLLINPUTRANGE_8_16);
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LL_RCC_PLL2_SetVCOOutputRange(LL_RCC_PLLVCORANGE_WIDE);
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LL_RCC_PLL2_SetM(10);
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LL_RCC_PLL2_SetN(192);
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LL_RCC_PLL2_SetP(15);
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LL_RCC_PLL2_SetQ(12);
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LL_RCC_PLL2_SetR(2);
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LL_RCC_PLL2P_Enable();
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LL_RCC_PLL2_Enable();
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/* Wait till PLL is ready */
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while(LL_RCC_PLL2_IsReady() != 1)
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{
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}
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LL_RCC_PLL3_SetSource(LL_RCC_PLL3SOURCE_HSE);
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LL_RCC_PLL3_SetVCOInputRange(LL_RCC_PLLINPUTRANGE_8_16);
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LL_RCC_PLL3_SetVCOOutputRange(LL_RCC_PLLVCORANGE_WIDE);
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LL_RCC_PLL3_SetM(1);
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LL_RCC_PLL3_SetN(8);
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LL_RCC_PLL3_SetP(2);
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LL_RCC_PLL3_SetQ(4);
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LL_RCC_PLL3_SetR(4);
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LL_RCC_PLL3Q_Enable();
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LL_RCC_PLL3R_Enable();
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LL_RCC_PLL3_Enable();
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/* Wait till PLL is ready */
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while(LL_RCC_PLL3_IsReady() != 1)
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{
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}
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}
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/**
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* @brief GPDMA1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_GPDMA1_Init(void)
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{
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/* USER CODE BEGIN GPDMA1_Init 0 */
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/* USER CODE END GPDMA1_Init 0 */
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/* Peripheral clock enable */
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPDMA1);
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/* USER CODE BEGIN GPDMA1_Init 1 */
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/* USER CODE END GPDMA1_Init 1 */
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/* USER CODE BEGIN GPDMA1_Init 2 */
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/* USER CODE END GPDMA1_Init 2 */
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}
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/**
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* @brief GPDMA2 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_GPDMA2_Init(void)
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{
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/* USER CODE BEGIN GPDMA2_Init 0 */
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/* USER CODE END GPDMA2_Init 0 */
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/* Peripheral clock enable */
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPDMA2);
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/* USER CODE BEGIN GPDMA2_Init 1 */
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/* USER CODE END GPDMA2_Init 1 */
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/* USER CODE BEGIN GPDMA2_Init 2 */
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/* USER CODE END GPDMA2_Init 2 */
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}
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/**
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* @brief I2C1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_I2C1_Init(void)
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{
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/* USER CODE BEGIN I2C1_Init 0 */
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/* USER CODE END I2C1_Init 0 */
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LL_I2C_InitTypeDef I2C_InitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PLL3R);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
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/**I2C1 GPIO Configuration
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PB6 ------> I2C1_SCL
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PB7 ------> I2C1_SDA
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
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LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* Peripheral clock enable */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
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/* USER CODE BEGIN I2C1_Init 1 */
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/* USER CODE END I2C1_Init 1 */
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/** I2C Initialization
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*/
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LL_I2C_EnableAutoEndMode(I2C1);
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LL_I2C_DisableOwnAddress2(I2C1);
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LL_I2C_DisableGeneralCall(I2C1);
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LL_I2C_EnableClockStretching(I2C1);
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I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C;
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I2C_InitStruct.Timing = 0x00707CBB;
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I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
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I2C_InitStruct.DigitalFilter = 0;
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I2C_InitStruct.OwnAddress1 = 0;
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I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK;
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I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
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LL_I2C_Init(I2C1, &I2C_InitStruct);
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LL_I2C_SetOwnAddress2(I2C1, 0, LL_I2C_OWNADDRESS2_NOMASK);
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/** I2C Fast mode Plus enable
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*/
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LL_I2C_EnableFastModePlus(I2C1);
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/* USER CODE BEGIN I2C1_Init 2 */
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/* USER CODE END I2C1_Init 2 */
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}
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/**
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* @brief I2S2 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_I2S2_Init(void)
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{
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/* USER CODE BEGIN I2S2_Init 0 */
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// WARNING
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// Remove the second redefinition of NodeConfig after Cube MX code generation.
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LL_DMA_InitNodeTypeDef NodeConfig = {0};
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NodeConfig.SrcAddress = (uint32_t)&I2S2TxDmaBuf;
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NodeConfig.DestAddress = (uint32_t)LL_SPI_DMA_GetTxRegAddr(SPI2);
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NodeConfig.BlkDataLength = sizeof(I2S2TxDmaBuf);
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/* USER CODE END I2S2_Init 0 */
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LL_I2S_InitTypeDef I2S_InitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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LL_DMA_InitLinkedListTypeDef DMA_InitLinkedListStruct = {0};
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LL_RCC_SetSPIClockSource(LL_RCC_SPI2_CLKSOURCE_PLL2P);
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/* Peripheral clock enable */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
|
|
/**I2S2 GPIO Configuration
|
|
PC2 ------> I2S2_SDI
|
|
PB12 ------> I2S2_WS
|
|
PB13 ------> I2S2_CK
|
|
PB15 ------> I2S2_SDO
|
|
*/
|
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
|
|
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
|
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_12|LL_GPIO_PIN_13|LL_GPIO_PIN_15;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
|
|
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
|
|
/* I2S2 DMA Init */
|
|
|
|
/* GPDMA2_REQUEST_SPI2_TX Init */
|
|
NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0;
|
|
NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE;
|
|
NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE;
|
|
NodeConfig.DestBurstLength = 1;
|
|
NodeConfig.DestIncMode = LL_DMA_DEST_FIXED;
|
|
NodeConfig.DestDataWidth = LL_DMA_DEST_DATAWIDTH_WORD;
|
|
NodeConfig.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT1;
|
|
NodeConfig.SrcByteExchange = LL_DMA_SRC_BYTE_PRESERVE;
|
|
NodeConfig.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD;
|
|
NodeConfig.SrcBurstLength = 1;
|
|
NodeConfig.SrcIncMode = LL_DMA_SRC_INCREMENT;
|
|
NodeConfig.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_WORD;
|
|
NodeConfig.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
NodeConfig.Mode = LL_DMA_NORMAL;
|
|
NodeConfig.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED;
|
|
NodeConfig.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST;
|
|
NodeConfig.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
|
|
NodeConfig.Request = LL_GPDMA2_REQUEST_SPI2_TX;
|
|
NodeConfig.UpdateRegisters = (LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 | LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CTR3 | LL_DMA_UPDATE_CBR2 | LL_DMA_UPDATE_CLLR);
|
|
NodeConfig.NodeType = LL_DMA_GPDMA_LINEAR_NODE;
|
|
LL_DMA_CreateLinkNode(&NodeConfig, &Node_GPDMA2_Channel0);
|
|
|
|
LL_DMA_ConnectLinkNode(&Node_GPDMA2_Channel0, LL_DMA_CLLR_OFFSET5, &Node_GPDMA2_Channel0, LL_DMA_CLLR_OFFSET5);
|
|
|
|
/* Next function call is commented because it will not compile as is. The Node structure address has to be cast to an unsigned int (uint32_t)pNode_DMAxCHy */
|
|
/*
|
|
|
|
*/
|
|
LL_DMA_SetLinkedListBaseAddr(GPDMA2, LL_DMA_CHANNEL_0, (uint32_t)&Node_GPDMA2_Channel0);
|
|
|
|
DMA_InitLinkedListStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT;
|
|
DMA_InitLinkedListStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION;
|
|
DMA_InitLinkedListStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1;
|
|
DMA_InitLinkedListStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
LL_DMA_List_Init(GPDMA2, LL_DMA_CHANNEL_0, &DMA_InitLinkedListStruct);
|
|
|
|
/* USER CODE BEGIN I2S2_Init 1 */
|
|
|
|
LL_DMA_ConfigLinkUpdate(GPDMA2, LL_DMA_CHANNEL_0, LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 |LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR, (uint32_t)&Node_GPDMA2_Channel0);
|
|
LL_DMA_EnableChannel(GPDMA2, LL_DMA_CHANNEL_0);
|
|
LL_DMA_SetLinkedListAddrOffset(GPDMA2, LL_DMA_CHANNEL_0, LL_DMA_CLLR_OFFSET5);
|
|
LL_I2S_EnableDMAReq_TX(SPI2);
|
|
|
|
|
|
/* USER CODE END I2S2_Init 1 */
|
|
I2S_InitStruct.Mode = LL_I2S_MODE_MASTER_FULL_DUPLEX;
|
|
I2S_InitStruct.Standard = LL_I2S_STANDARD_PHILIPS;
|
|
I2S_InitStruct.DataFormat = LL_I2S_DATAFORMAT_32B;
|
|
I2S_InitStruct.MCLKOutput = LL_I2S_MCLK_OUTPUT_DISABLE;
|
|
I2S_InitStruct.AudioFreq = 32000;
|
|
I2S_InitStruct.ClockPolarity = LL_I2S_POLARITY_LOW;
|
|
LL_I2S_Init(SPI2, &I2S_InitStruct);
|
|
/* USER CODE BEGIN I2S2_Init 2 */
|
|
|
|
LL_I2S_Enable(SPI2);
|
|
LL_I2S_StartTransfer(SPI2);
|
|
|
|
/* USER CODE END I2S2_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief ICACHE Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_ICACHE_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN ICACHE_Init 0 */
|
|
|
|
/* USER CODE END ICACHE_Init 0 */
|
|
|
|
/* USER CODE BEGIN ICACHE_Init 1 */
|
|
|
|
/* USER CODE END ICACHE_Init 1 */
|
|
|
|
/** Enable instruction cache (default 2-ways set associative cache)
|
|
*/
|
|
LL_ICACHE_Enable();
|
|
/* USER CODE BEGIN ICACHE_Init 2 */
|
|
|
|
/* USER CODE END ICACHE_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief TIM2 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_TIM2_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN TIM2_Init 0 */
|
|
|
|
/* USER CODE END TIM2_Init 0 */
|
|
|
|
LL_TIM_InitTypeDef TIM_InitStruct = {0};
|
|
|
|
/* Peripheral clock enable */
|
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
|
|
|
|
/* USER CODE BEGIN TIM2_Init 1 */
|
|
|
|
/* USER CODE END TIM2_Init 1 */
|
|
TIM_InitStruct.Prescaler = 39999;
|
|
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
|
|
TIM_InitStruct.Autoreload = 4294967295;
|
|
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
|
|
LL_TIM_Init(TIM2, &TIM_InitStruct);
|
|
LL_TIM_DisableARRPreload(TIM2);
|
|
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
|
|
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
|
|
LL_TIM_DisableMasterSlaveMode(TIM2);
|
|
/* USER CODE BEGIN TIM2_Init 2 */
|
|
|
|
/* USER CODE END TIM2_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief TIM5 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_TIM5_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN TIM5_Init 0 */
|
|
|
|
/* USER CODE END TIM5_Init 0 */
|
|
|
|
LL_TIM_InitTypeDef TIM_InitStruct = {0};
|
|
|
|
/* Peripheral clock enable */
|
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5);
|
|
|
|
/* USER CODE BEGIN TIM5_Init 1 */
|
|
|
|
/* USER CODE END TIM5_Init 1 */
|
|
TIM_InitStruct.Prescaler = 79;
|
|
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
|
|
TIM_InitStruct.Autoreload = 4294967295;
|
|
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
|
|
LL_TIM_Init(TIM5, &TIM_InitStruct);
|
|
LL_TIM_DisableARRPreload(TIM5);
|
|
LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
|
|
LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
|
|
LL_TIM_DisableMasterSlaveMode(TIM5);
|
|
/* USER CODE BEGIN TIM5_Init 2 */
|
|
|
|
/* USER CODE END TIM5_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief UART5 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_UART5_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN UART5_Init 0 */
|
|
|
|
/* USER CODE END UART5_Init 0 */
|
|
|
|
LL_USART_InitTypeDef UART_InitStruct = {0};
|
|
|
|
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
|
|
LL_RCC_SetUARTClockSource(LL_RCC_UART5_CLKSOURCE_PLL3Q);
|
|
|
|
/* Peripheral clock enable */
|
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UART5);
|
|
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD);
|
|
/**UART5 GPIO Configuration
|
|
PC12 ------> UART5_TX
|
|
PD2 ------> UART5_RX
|
|
*/
|
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
|
|
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
|
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
|
|
LL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
|
|
|
/* UART5 interrupt Init */
|
|
NVIC_SetPriority(UART5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
|
|
NVIC_EnableIRQ(UART5_IRQn);
|
|
|
|
/* USER CODE BEGIN UART5_Init 1 */
|
|
|
|
/* USER CODE END UART5_Init 1 */
|
|
UART_InitStruct.BaudRate = 115200;
|
|
UART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
|
|
UART_InitStruct.StopBits = LL_USART_STOPBITS_1;
|
|
UART_InitStruct.Parity = LL_USART_PARITY_NONE;
|
|
UART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
|
|
UART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
|
|
UART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
|
|
LL_USART_Init(UART5, &UART_InitStruct);
|
|
LL_USART_ConfigAsyncMode(UART5);
|
|
LL_USART_Enable(UART5);
|
|
/* USER CODE BEGIN UART5_Init 2 */
|
|
|
|
/* USER CODE END UART5_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief USART2 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_USART2_UART_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN USART2_Init 0 */
|
|
|
|
// WARNING
|
|
// Remove the second redefinition of NodeConfig after Cube MX code generation.
|
|
LL_DMA_InitNodeTypeDef NodeConfig = {0};
|
|
|
|
NodeConfig.SrcAddress = (uint32_t)LL_USART_DMA_GetRegAddr(USART2, LL_USART_DMA_REG_DATA_RECEIVE);
|
|
NodeConfig.DestAddress = (uint32_t)&Usart2RxDmaBuf;
|
|
NodeConfig.BlkDataLength = ARRAY_COUNT(Usart2RxDmaBuf);
|
|
|
|
|
|
/* USER CODE END USART2_Init 0 */
|
|
|
|
LL_USART_InitTypeDef USART_InitStruct = {0};
|
|
|
|
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
LL_DMA_InitLinkedListTypeDef DMA_InitLinkedListStruct = {0};
|
|
LL_DMA_InitTypeDef DMA_InitStruct = {0};
|
|
|
|
LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1);
|
|
|
|
/* Peripheral clock enable */
|
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
|
|
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
|
|
/**USART2 GPIO Configuration
|
|
PA1 ------> USART2_DE
|
|
PA2 ------> USART2_TX
|
|
PA3 ------> USART2_RX
|
|
*/
|
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_3;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
|
|
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
|
|
/* USART2 DMA Init */
|
|
|
|
/* GPDMA1_REQUEST_USART2_RX Init */
|
|
NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT1;
|
|
NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE;
|
|
NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE;
|
|
NodeConfig.DestBurstLength = 1;
|
|
NodeConfig.DestIncMode = LL_DMA_DEST_INCREMENT;
|
|
NodeConfig.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE;
|
|
NodeConfig.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT0;
|
|
NodeConfig.SrcByteExchange = LL_DMA_SRC_BYTE_PRESERVE;
|
|
NodeConfig.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD;
|
|
NodeConfig.SrcBurstLength = 1;
|
|
NodeConfig.SrcIncMode = LL_DMA_SRC_FIXED;
|
|
NodeConfig.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE;
|
|
NodeConfig.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
NodeConfig.Mode = LL_DMA_NORMAL;
|
|
NodeConfig.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED;
|
|
NodeConfig.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST;
|
|
NodeConfig.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
|
|
NodeConfig.Request = LL_GPDMA1_REQUEST_USART2_RX;
|
|
NodeConfig.UpdateRegisters = (LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 | LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CTR3 | LL_DMA_UPDATE_CBR2 | LL_DMA_UPDATE_CLLR);
|
|
NodeConfig.NodeType = LL_DMA_GPDMA_LINEAR_NODE;
|
|
LL_DMA_CreateLinkNode(&NodeConfig, &Node_GPDMA1_Channel3);
|
|
|
|
LL_DMA_ConnectLinkNode(&Node_GPDMA1_Channel3, LL_DMA_CLLR_OFFSET5, &Node_GPDMA1_Channel3, LL_DMA_CLLR_OFFSET5);
|
|
|
|
/* Next function call is commented because it will not compile as is. The Node structure address has to be cast to an unsigned int (uint32_t)pNode_DMAxCHy */
|
|
/*
|
|
|
|
*/
|
|
LL_DMA_SetLinkedListBaseAddr(GPDMA1, LL_DMA_CHANNEL_3, (uint32_t)&Node_GPDMA1_Channel3);
|
|
|
|
DMA_InitLinkedListStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT;
|
|
DMA_InitLinkedListStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION;
|
|
DMA_InitLinkedListStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1;
|
|
DMA_InitLinkedListStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
LL_DMA_List_Init(GPDMA1, LL_DMA_CHANNEL_3, &DMA_InitLinkedListStruct);
|
|
|
|
/* GPDMA1_REQUEST_USART2_TX Init */
|
|
DMA_InitStruct.SrcAddress = 0x00000000U;
|
|
DMA_InitStruct.DestAddress = 0x00000000U;
|
|
DMA_InitStruct.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
|
|
DMA_InitStruct.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST;
|
|
DMA_InitStruct.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD;
|
|
DMA_InitStruct.SrcBurstLength = 1;
|
|
DMA_InitStruct.DestBurstLength = 1;
|
|
DMA_InitStruct.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE;
|
|
DMA_InitStruct.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE;
|
|
DMA_InitStruct.SrcIncMode = LL_DMA_SRC_INCREMENT;
|
|
DMA_InitStruct.DestIncMode = LL_DMA_DEST_FIXED;
|
|
DMA_InitStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT;
|
|
DMA_InitStruct.BlkDataLength = 0x00000000U;
|
|
DMA_InitStruct.TriggerMode = LL_DMA_TRIGM_BLK_TRANSFER;
|
|
DMA_InitStruct.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED;
|
|
DMA_InitStruct.TriggerSelection = 0x00000000U;
|
|
DMA_InitStruct.Request = LL_GPDMA1_REQUEST_USART2_TX;
|
|
DMA_InitStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
DMA_InitStruct.Mode = LL_DMA_NORMAL;
|
|
DMA_InitStruct.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT1;
|
|
DMA_InitStruct.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0;
|
|
DMA_InitStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1;
|
|
DMA_InitStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION;
|
|
DMA_InitStruct.LinkedListBaseAddr = 0x00000000U;
|
|
DMA_InitStruct.LinkedListAddrOffset = 0x00000000U;
|
|
LL_DMA_Init(GPDMA1, LL_DMA_CHANNEL_2, &DMA_InitStruct);
|
|
|
|
/* USER CODE BEGIN USART2_Init 1 */
|
|
|
|
LL_DMA_ConfigLinkUpdate(GPDMA1, LL_DMA_CHANNEL_3, LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 |LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR, (uint32_t)&Node_GPDMA1_Channel3);
|
|
LL_DMA_EnableChannel(GPDMA1, LL_DMA_CHANNEL_3);
|
|
LL_DMA_SetLinkedListAddrOffset(GPDMA1, LL_DMA_CHANNEL_3, LL_DMA_CLLR_OFFSET5);
|
|
LL_USART_EnableDMAReq_RX(USART2);
|
|
|
|
LL_DMA_SetDestAddress(GPDMA1, LL_DMA_CHANNEL_2, LL_USART_DMA_GetRegAddr(USART2, LL_USART_DMA_REG_DATA_TRANSMIT));
|
|
LL_USART_EnableDMAReq_TX(USART2);
|
|
|
|
/* USER CODE END USART2_Init 1 */
|
|
USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1;
|
|
USART_InitStruct.BaudRate = 115200;
|
|
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
|
|
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
|
|
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
|
|
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
|
|
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
|
|
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
|
|
LL_USART_Init(USART2, &USART_InitStruct);
|
|
LL_USART_SetTXFIFOThreshold(USART2, LL_USART_FIFOTHRESHOLD_1_8);
|
|
LL_USART_SetRXFIFOThreshold(USART2, LL_USART_FIFOTHRESHOLD_1_8);
|
|
LL_USART_EnableDEMode(USART2);
|
|
LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_HIGH);
|
|
LL_USART_SetDEAssertionTime(USART2, 0);
|
|
LL_USART_SetDEDeassertionTime(USART2, 0);
|
|
LL_USART_DisableFIFO(USART2);
|
|
LL_USART_ConfigAsyncMode(USART2);
|
|
LL_USART_Enable(USART2);
|
|
/* USER CODE BEGIN USART2_Init 2 */
|
|
|
|
/* USER CODE END USART2_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief USART3 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_USART3_UART_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN USART3_Init 0 */
|
|
|
|
// WARNING
|
|
// Remove the second redefinition of NodeConfig after Cube MX code generation.
|
|
LL_DMA_InitNodeTypeDef NodeConfig = {0};
|
|
|
|
NodeConfig.SrcAddress = (uint32_t)LL_USART_DMA_GetRegAddr(USART3, LL_USART_DMA_REG_DATA_RECEIVE);
|
|
NodeConfig.DestAddress = (uint32_t)&Usart3RxDmaBuf;
|
|
NodeConfig.BlkDataLength = ARRAY_COUNT(Usart3RxDmaBuf);
|
|
|
|
|
|
/* USER CODE END USART3_Init 0 */
|
|
|
|
LL_USART_InitTypeDef USART_InitStruct = {0};
|
|
|
|
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
LL_DMA_InitLinkedListTypeDef DMA_InitLinkedListStruct = {0};
|
|
LL_DMA_InitTypeDef DMA_InitStruct = {0};
|
|
|
|
LL_RCC_SetUSARTClockSource(LL_RCC_USART3_CLKSOURCE_PCLK1);
|
|
|
|
/* Peripheral clock enable */
|
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3);
|
|
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
|
|
/**USART3 GPIO Configuration
|
|
PB1 ------> USART3_RX
|
|
PB10 ------> USART3_TX
|
|
PB14 ------> USART3_DE
|
|
*/
|
|
GPIO_InitStruct.Pin = LL_GPIO_PIN_1|LL_GPIO_PIN_10|LL_GPIO_PIN_14;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
|
|
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
|
|
/* USART3 DMA Init */
|
|
|
|
/* GPDMA1_REQUEST_USART3_RX Init */
|
|
NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT1;
|
|
NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE;
|
|
NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE;
|
|
NodeConfig.DestBurstLength = 1;
|
|
NodeConfig.DestIncMode = LL_DMA_DEST_INCREMENT;
|
|
NodeConfig.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE;
|
|
NodeConfig.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT0;
|
|
NodeConfig.SrcByteExchange = LL_DMA_SRC_BYTE_PRESERVE;
|
|
NodeConfig.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD;
|
|
NodeConfig.SrcBurstLength = 1;
|
|
NodeConfig.SrcIncMode = LL_DMA_SRC_FIXED;
|
|
NodeConfig.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE;
|
|
NodeConfig.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
NodeConfig.Mode = LL_DMA_NORMAL;
|
|
NodeConfig.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED;
|
|
NodeConfig.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST;
|
|
NodeConfig.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
|
|
NodeConfig.Request = LL_GPDMA1_REQUEST_USART3_RX;
|
|
NodeConfig.UpdateRegisters = (LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 | LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CTR3 | LL_DMA_UPDATE_CBR2 | LL_DMA_UPDATE_CLLR);
|
|
NodeConfig.NodeType = LL_DMA_GPDMA_LINEAR_NODE;
|
|
LL_DMA_CreateLinkNode(&NodeConfig, &Node_GPDMA1_Channel1);
|
|
|
|
LL_DMA_ConnectLinkNode(&Node_GPDMA1_Channel1, LL_DMA_CLLR_OFFSET5, &Node_GPDMA1_Channel1, LL_DMA_CLLR_OFFSET5);
|
|
|
|
/* Next function call is commented because it will not compile as is. The Node structure address has to be cast to an unsigned int (uint32_t)pNode_DMAxCHy */
|
|
/*
|
|
|
|
*/
|
|
LL_DMA_SetLinkedListBaseAddr(GPDMA1, LL_DMA_CHANNEL_1, (uint32_t)&Node_GPDMA1_Channel1);
|
|
|
|
DMA_InitLinkedListStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT;
|
|
DMA_InitLinkedListStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION;
|
|
DMA_InitLinkedListStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1;
|
|
DMA_InitLinkedListStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
LL_DMA_List_Init(GPDMA1, LL_DMA_CHANNEL_1, &DMA_InitLinkedListStruct);
|
|
|
|
/* GPDMA1_REQUEST_USART3_TX Init */
|
|
DMA_InitStruct.SrcAddress = 0x00000000U;
|
|
DMA_InitStruct.DestAddress = 0x00000000U;
|
|
DMA_InitStruct.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
|
|
DMA_InitStruct.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST;
|
|
DMA_InitStruct.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD;
|
|
DMA_InitStruct.SrcBurstLength = 1;
|
|
DMA_InitStruct.DestBurstLength = 1;
|
|
DMA_InitStruct.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE;
|
|
DMA_InitStruct.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE;
|
|
DMA_InitStruct.SrcIncMode = LL_DMA_SRC_INCREMENT;
|
|
DMA_InitStruct.DestIncMode = LL_DMA_DEST_FIXED;
|
|
DMA_InitStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT;
|
|
DMA_InitStruct.BlkDataLength = 0x00000000U;
|
|
DMA_InitStruct.TriggerMode = LL_DMA_TRIGM_BLK_TRANSFER;
|
|
DMA_InitStruct.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED;
|
|
DMA_InitStruct.TriggerSelection = 0x00000000U;
|
|
DMA_InitStruct.Request = LL_GPDMA1_REQUEST_USART3_TX;
|
|
DMA_InitStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
|
|
DMA_InitStruct.Mode = LL_DMA_NORMAL;
|
|
DMA_InitStruct.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT1;
|
|
DMA_InitStruct.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0;
|
|
DMA_InitStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1;
|
|
DMA_InitStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION;
|
|
DMA_InitStruct.LinkedListBaseAddr = 0x00000000U;
|
|
DMA_InitStruct.LinkedListAddrOffset = 0x00000000U;
|
|
LL_DMA_Init(GPDMA1, LL_DMA_CHANNEL_0, &DMA_InitStruct);
|
|
|
|
/* USER CODE BEGIN USART3_Init 1 */
|
|
|
|
LL_DMA_ConfigLinkUpdate(GPDMA1, LL_DMA_CHANNEL_1, LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 |LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR, (uint32_t)&Node_GPDMA1_Channel1);
|
|
LL_DMA_EnableChannel(GPDMA1, LL_DMA_CHANNEL_1);
|
|
LL_DMA_SetLinkedListAddrOffset(GPDMA1, LL_DMA_CHANNEL_1, LL_DMA_CLLR_OFFSET5);
|
|
LL_USART_EnableDMAReq_RX(USART3);
|
|
|
|
LL_DMA_SetDestAddress(GPDMA1, LL_DMA_CHANNEL_0, LL_USART_DMA_GetRegAddr(USART3, LL_USART_DMA_REG_DATA_TRANSMIT));
|
|
LL_USART_EnableDMAReq_TX(USART3);
|
|
|
|
/* USER CODE END USART3_Init 1 */
|
|
USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1;
|
|
USART_InitStruct.BaudRate = 115200;
|
|
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
|
|
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
|
|
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
|
|
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
|
|
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
|
|
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
|
|
LL_USART_Init(USART3, &USART_InitStruct);
|
|
LL_USART_SetTXFIFOThreshold(USART3, LL_USART_FIFOTHRESHOLD_1_8);
|
|
LL_USART_SetRXFIFOThreshold(USART3, LL_USART_FIFOTHRESHOLD_1_8);
|
|
LL_USART_EnableDEMode(USART3);
|
|
LL_USART_SetDESignalPolarity(USART3, LL_USART_DE_POLARITY_HIGH);
|
|
LL_USART_SetDEAssertionTime(USART3, 0);
|
|
LL_USART_SetDEDeassertionTime(USART3, 0);
|
|
LL_USART_DisableFIFO(USART3);
|
|
LL_USART_ConfigAsyncMode(USART3);
|
|
LL_USART_Enable(USART3);
|
|
/* USER CODE BEGIN USART3_Init 2 */
|
|
|
|
|
|
/* USER CODE END USART3_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
/* USER CODE BEGIN MX_GPIO_Init_1 */
|
|
|
|
/* USER CODE END MX_GPIO_Init_1 */
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH);
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
|
|
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD);
|
|
|
|
/**/
|
|
LL_GPIO_ResetOutputPin(GPIOC, SHR_CLK_Pin|SHR_STR_Pin);
|
|
|
|
/**/
|
|
LL_GPIO_ResetOutputPin(SHR_DOUT_DISP_GPIO_Port, SHR_DOUT_DISP_Pin);
|
|
|
|
/**/
|
|
LL_GPIO_SetOutputPin(CODEC_RST_GPIO_Port, CODEC_RST_Pin);
|
|
|
|
/**/
|
|
LL_GPIO_SetOutputPin(LD2_GPIO_Port, LD2_Pin);
|
|
|
|
/**/
|
|
GPIO_InitStruct.Pin = SHR_CLK_Pin|SHR_STR_Pin|LD2_Pin;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
|
|
/**/
|
|
GPIO_InitStruct.Pin = CODEC_RST_Pin;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
|
|
LL_GPIO_Init(CODEC_RST_GPIO_Port, &GPIO_InitStruct);
|
|
|
|
/**/
|
|
GPIO_InitStruct.Pin = SHR_DOUT_DISP_Pin;
|
|
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
|
|
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
|
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
|
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
|
|
LL_GPIO_Init(SHR_DOUT_DISP_GPIO_Port, &GPIO_InitStruct);
|
|
|
|
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
|
|
|
/* USER CODE END MX_GPIO_Init_2 */
|
|
}
|
|
|
|
/* USER CODE BEGIN 4 */
|
|
|
|
/* USER CODE END 4 */
|
|
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
{
|
|
}
|
|
/* USER CODE END Error_Handler_Debug */
|
|
}
|
|
#ifdef USE_FULL_ASSERT
|
|
/**
|
|
* @brief Reports the name of the source file and the source line number
|
|
* where the assert_param error has occurred.
|
|
* @param file: pointer to the source file name
|
|
* @param line: assert_param error line source number
|
|
* @retval None
|
|
*/
|
|
void assert_failed(uint8_t *file, uint32_t line)
|
|
{
|
|
/* USER CODE BEGIN 6 */
|
|
/* User can add his own implementation to report the file name and line number,
|
|
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
|
/* USER CODE END 6 */
|
|
}
|
|
#endif /* USE_FULL_ASSERT */
|