/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2026 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ #include #include #include "disp7seg.h" #include "printf.h" #include "usart3_dma.h" #include "uart5_it.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN PTD */ /* USER CODE END PTD */ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ #define ARRAY_COUNT(arr) (sizeof(arr) / sizeof((arr)[0])) /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ /* USER CODE BEGIN PM */ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ LL_DMA_LinkNodeTypeDef Node_GPDMA1_Channel1; /* USER CODE BEGIN PV */ /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); void PeriphCommonClock_Config(void); static void MX_GPIO_Init(void); static void MX_GPDMA1_Init(void); static void MX_ICACHE_Init(void); static void MX_TIM5_Init(void); static void MX_TIM2_Init(void); static void MX_USART3_UART_Init(void); static void MX_UART5_Init(void); /* USER CODE BEGIN PFP */ uint8_t Usart3_TxBufWrite(const void* src, size_t n, uint8_t start); /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ static inline void LD2_On() { LL_GPIO_SetOutputPin( LD2_GPIO_Port, LD2_Pin); } static inline void LD2_Off() { LL_GPIO_ResetOutputPin( LD2_GPIO_Port, LD2_Pin); } static inline void LD2_Toggle() { LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); } /***************************************************************************//** * @brief Check if specified time interval has elapsed * @param tref Pointer to time reference variable [ms] * @param tcycle Time interval in milliseconds *//****************************************************************************/ static inline uint32_t TickChk(uint32_t *tref, int_fast16_t tcycle) { uint32_t t = LL_TIM_GetCounter(TIM2) / 2; // 2kHz/2=1kHz int32_t tdif = t - *tref; if (tdif >= tcycle) { *tref += tcycle; return 1; } return 0; } /***************************************************************************//** * @brief Character send interface for printf function *//****************************************************************************/ void uart_putc (void* p, char c) { Uart5_PutByte(c); } void ProcessUsart3RxData(const uint8_t* data, uint16_t len) { for (uint16_t i = 0; i < len; i++) { printf("%c", data[i]); } } /* USER CODE END 0 */ /** * @brief The application entry point. * @retval int */ int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ /* System interrupt init*/ NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); /* SysTick_IRQn interrupt configuration */ NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0)); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* Configure the peripherals common clocks */ PeriphCommonClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_GPDMA1_Init(); MX_ICACHE_Init(); MX_TIM5_Init(); MX_TIM2_Init(); MX_USART3_UART_Init(); MX_UART5_Init(); /* USER CODE BEGIN 2 */ init_printf(NULL, &uart_putc); LL_TIM_GenerateEvent_UPDATE(TIM2); LL_TIM_EnableCounter(TIM2); LL_TIM_GenerateEvent_UPDATE(TIM5); LL_TIM_EnableCounter(TIM5); LL_Init1msTick(SystemCoreClock); DispPutDigit(0, ' ', 0); DispPutDigit(1, ' ', 0); DispPutDigit(2, ' ', 0); DispPutDigit(3, ' ', 0); ShiftReg_Update(); Usart3_DMA_Init(ProcessUsart3RxData); Uart5_Init(); printf("Hello printf\n"); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { static uint32_t Tick10msRef = 0; if (TickChk(&Tick10msRef, 10)) { // execute every 10ms ShiftReg_Update(); } static uint32_t Tick1secRef = 0; if (TickChk(&Tick1secRef, 1000)) { // execute every 1s LD2_Toggle(); static uint8_t cnt = 0; DispPutDigit(2, 'A'+cnt, 0); cnt = (cnt + 1) % 16; char s[256]; sprintf(s, "%u: Hello DMA World! This is a long message to test the double buffering mechanism of USART3 Tx DMA.\n", cnt); Usart3_TxBufWrite(s, strlen(s), cnt&0x04); // write data and request flush } static uint32_t Tick100msRef = 0; if (TickChk(&Tick100msRef, 100)) { // execute every 100ms static uint8_t dot = 0; dot ^= 1; // toggle dot DispPutDigit(3, ' ', dot); } int16_t ch = Uart5_GetByte(); if (ch != -1) { // if data received char c = ch; DispPutDigit(0, c, 0); } Usart3_DMA_Task(); // handle USART3 DMA rx/tx /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */ } /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { LL_FLASH_SetLatency(LL_FLASH_LATENCY_3); while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_3) { } LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE3); while (LL_PWR_IsActiveFlag_VOS() == 0) { } LL_RCC_HSE_Enable(); /* Wait till HSE is ready */ while(LL_RCC_HSE_IsReady() != 1) { } LL_RCC_PLL1_SetSource(LL_RCC_PLL1SOURCE_HSE); LL_RCC_PLL1_SetVCOInputRange(LL_RCC_PLLINPUTRANGE_8_16); LL_RCC_PLL1_SetVCOOutputRange(LL_RCC_PLLVCORANGE_WIDE); LL_RCC_PLL1_SetM(1); LL_RCC_PLL1_SetN(20); LL_RCC_PLL1_SetP(4); LL_RCC_PLL1_SetQ(10); LL_RCC_PLL1_SetR(2); LL_RCC_PLL1P_Enable(); LL_RCC_PLL1_Enable(); /* Wait till PLL is ready */ while(LL_RCC_PLL1_IsReady() != 1) { } LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL1); /* Wait till System clock is ready */ while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL1) { } LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); LL_RCC_SetAPB3Prescaler(LL_RCC_APB3_DIV_1); LL_Init1msTick(80000000); LL_SetSystemCoreClock(80000000); } /** * @brief Peripherals Common Clock Configuration * @retval None */ void PeriphCommonClock_Config(void) { LL_RCC_PLL3_SetSource(LL_RCC_PLL3SOURCE_HSE); LL_RCC_PLL3_SetVCOInputRange(LL_RCC_PLLINPUTRANGE_8_16); LL_RCC_PLL3_SetVCOOutputRange(LL_RCC_PLLVCORANGE_WIDE); LL_RCC_PLL3_SetM(1); LL_RCC_PLL3_SetN(8); LL_RCC_PLL3_SetP(2); LL_RCC_PLL3_SetQ(4); LL_RCC_PLL3_SetR(2); LL_RCC_PLL3Q_Enable(); LL_RCC_PLL3_Enable(); /* Wait till PLL is ready */ while(LL_RCC_PLL3_IsReady() != 1) { } } /** * @brief GPDMA1 Initialization Function * @param None * @retval None */ static void MX_GPDMA1_Init(void) { /* USER CODE BEGIN GPDMA1_Init 0 */ /* USER CODE END GPDMA1_Init 0 */ /* Peripheral clock enable */ LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPDMA1); /* GPDMA1 interrupt Init */ NVIC_SetPriority(GPDMA1_Channel0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_SetPriority(GPDMA1_Channel1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); /* USER CODE BEGIN GPDMA1_Init 1 */ /* USER CODE END GPDMA1_Init 1 */ /* USER CODE BEGIN GPDMA1_Init 2 */ /* USER CODE END GPDMA1_Init 2 */ } /** * @brief ICACHE Initialization Function * @param None * @retval None */ static void MX_ICACHE_Init(void) { /* USER CODE BEGIN ICACHE_Init 0 */ /* USER CODE END ICACHE_Init 0 */ /* USER CODE BEGIN ICACHE_Init 1 */ /* USER CODE END ICACHE_Init 1 */ /** Enable instruction cache (default 2-ways set associative cache) */ LL_ICACHE_Enable(); /* USER CODE BEGIN ICACHE_Init 2 */ /* USER CODE END ICACHE_Init 2 */ } /** * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ LL_TIM_InitTypeDef TIM_InitStruct = {0}; /* Peripheral clock enable */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ TIM_InitStruct.Prescaler = 39999; TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; TIM_InitStruct.Autoreload = 4294967295; TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; LL_TIM_Init(TIM2, &TIM_InitStruct); LL_TIM_DisableARRPreload(TIM2); LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); LL_TIM_DisableMasterSlaveMode(TIM2); /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ } /** * @brief TIM5 Initialization Function * @param None * @retval None */ static void MX_TIM5_Init(void) { /* USER CODE BEGIN TIM5_Init 0 */ /* USER CODE END TIM5_Init 0 */ LL_TIM_InitTypeDef TIM_InitStruct = {0}; /* Peripheral clock enable */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); /* USER CODE BEGIN TIM5_Init 1 */ /* USER CODE END TIM5_Init 1 */ TIM_InitStruct.Prescaler = 79; TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; TIM_InitStruct.Autoreload = 4294967295; TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; LL_TIM_Init(TIM5, &TIM_InitStruct); LL_TIM_DisableARRPreload(TIM5); LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); LL_TIM_DisableMasterSlaveMode(TIM5); /* USER CODE BEGIN TIM5_Init 2 */ /* USER CODE END TIM5_Init 2 */ } /** * @brief UART5 Initialization Function * @param None * @retval None */ static void MX_UART5_Init(void) { /* USER CODE BEGIN UART5_Init 0 */ /* USER CODE END UART5_Init 0 */ LL_USART_InitTypeDef UART_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_RCC_SetUARTClockSource(LL_RCC_UART5_CLKSOURCE_PLL3Q); /* Peripheral clock enable */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UART5); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD); /**UART5 GPIO Configuration PC12 ------> UART5_TX PD2 ------> UART5_RX */ GPIO_InitStruct.Pin = LL_GPIO_PIN_12; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; GPIO_InitStruct.Alternate = LL_GPIO_AF_8; LL_GPIO_Init(GPIOC, &GPIO_InitStruct); GPIO_InitStruct.Pin = LL_GPIO_PIN_2; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; GPIO_InitStruct.Alternate = LL_GPIO_AF_8; LL_GPIO_Init(GPIOD, &GPIO_InitStruct); /* UART5 interrupt Init */ NVIC_SetPriority(UART5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_EnableIRQ(UART5_IRQn); /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ UART_InitStruct.BaudRate = 115200; UART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; UART_InitStruct.StopBits = LL_USART_STOPBITS_1; UART_InitStruct.Parity = LL_USART_PARITY_NONE; UART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; UART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; UART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; LL_USART_Init(UART5, &UART_InitStruct); LL_USART_ConfigAsyncMode(UART5); LL_USART_Enable(UART5); /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } /** * @brief USART3 Initialization Function * @param None * @retval None */ static void MX_USART3_UART_Init(void) { /* USER CODE BEGIN USART3_Init 0 */ // WARNING // Remove the second redefinition of NodeConfig after Cube MX code generation. LL_DMA_InitNodeTypeDef NodeConfig = {0}; NodeConfig.SrcAddress = (uint32_t)LL_USART_DMA_GetRegAddr(USART3, LL_USART_DMA_REG_DATA_RECEIVE); NodeConfig.DestAddress = (uint32_t)&Usart3RxDmaBuf; NodeConfig.BlkDataLength = ARRAY_COUNT(Usart3RxDmaBuf); /* USER CODE END USART3_Init 0 */ LL_USART_InitTypeDef USART_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_DMA_InitLinkedListTypeDef DMA_InitLinkedListStruct = {0}; LL_DMA_InitTypeDef DMA_InitStruct = {0}; LL_RCC_SetUSARTClockSource(LL_RCC_USART3_CLKSOURCE_PCLK1); /* Peripheral clock enable */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); /**USART3 GPIO Configuration PB1 ------> USART3_RX PB10 ------> USART3_TX PB14 ------> USART3_DE */ GPIO_InitStruct.Pin = LL_GPIO_PIN_1|LL_GPIO_PIN_10|LL_GPIO_PIN_14; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; GPIO_InitStruct.Alternate = LL_GPIO_AF_7; LL_GPIO_Init(GPIOB, &GPIO_InitStruct); /* USART3 DMA Init */ /* GPDMA1_REQUEST_USART3_RX Init */ NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT1; NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE; NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE; NodeConfig.DestBurstLength = 1; NodeConfig.DestIncMode = LL_DMA_DEST_INCREMENT; NodeConfig.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE; NodeConfig.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT0; NodeConfig.SrcByteExchange = LL_DMA_SRC_BYTE_PRESERVE; NodeConfig.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD; NodeConfig.SrcBurstLength = 1; NodeConfig.SrcIncMode = LL_DMA_SRC_FIXED; NodeConfig.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE; NodeConfig.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER; NodeConfig.Mode = LL_DMA_NORMAL; NodeConfig.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED; NodeConfig.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST; NodeConfig.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY; NodeConfig.Request = LL_GPDMA1_REQUEST_USART3_RX; NodeConfig.UpdateRegisters = (LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 | LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CTR3 | LL_DMA_UPDATE_CBR2 | LL_DMA_UPDATE_CLLR); NodeConfig.NodeType = LL_DMA_GPDMA_LINEAR_NODE; LL_DMA_CreateLinkNode(&NodeConfig, &Node_GPDMA1_Channel1); LL_DMA_ConnectLinkNode(&Node_GPDMA1_Channel1, LL_DMA_CLLR_OFFSET5, &Node_GPDMA1_Channel1, LL_DMA_CLLR_OFFSET5); /* Next function call is commented because it will not compile as is. The Node structure address has to be cast to an unsigned int (uint32_t)pNode_DMAxCHy */ /* */ LL_DMA_SetLinkedListBaseAddr(GPDMA1, LL_DMA_CHANNEL_1, (uint32_t)&Node_GPDMA1_Channel1); DMA_InitLinkedListStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT; DMA_InitLinkedListStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION; DMA_InitLinkedListStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1; DMA_InitLinkedListStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER; LL_DMA_List_Init(GPDMA1, LL_DMA_CHANNEL_1, &DMA_InitLinkedListStruct); /* GPDMA1_REQUEST_USART3_TX Init */ DMA_InitStruct.SrcAddress = 0x00000000U; DMA_InitStruct.DestAddress = 0x00000000U; DMA_InitStruct.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH; DMA_InitStruct.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST; DMA_InitStruct.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD; DMA_InitStruct.SrcBurstLength = 1; DMA_InitStruct.DestBurstLength = 1; DMA_InitStruct.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE; DMA_InitStruct.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE; DMA_InitStruct.SrcIncMode = LL_DMA_SRC_INCREMENT; DMA_InitStruct.DestIncMode = LL_DMA_DEST_FIXED; DMA_InitStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT; DMA_InitStruct.BlkDataLength = 0x00000000U; DMA_InitStruct.TriggerMode = LL_DMA_TRIGM_BLK_TRANSFER; DMA_InitStruct.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED; DMA_InitStruct.TriggerSelection = 0x00000000U; DMA_InitStruct.Request = LL_GPDMA1_REQUEST_USART3_TX; DMA_InitStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER; DMA_InitStruct.Mode = LL_DMA_NORMAL; DMA_InitStruct.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT1; DMA_InitStruct.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0; DMA_InitStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1; DMA_InitStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION; DMA_InitStruct.LinkedListBaseAddr = 0x00000000U; DMA_InitStruct.LinkedListAddrOffset = 0x00000000U; LL_DMA_Init(GPDMA1, LL_DMA_CHANNEL_0, &DMA_InitStruct); /* USER CODE BEGIN USART3_Init 1 */ LL_DMA_ConfigLinkUpdate(GPDMA1, LL_DMA_CHANNEL_1, LL_DMA_UPDATE_CTR1 | LL_DMA_UPDATE_CTR2 |LL_DMA_UPDATE_CBR1 | LL_DMA_UPDATE_CSAR | LL_DMA_UPDATE_CDAR | LL_DMA_UPDATE_CLLR, (uint32_t)&Node_GPDMA1_Channel1); LL_DMA_EnableChannel(GPDMA1, LL_DMA_CHANNEL_1); LL_DMA_SetLinkedListAddrOffset(GPDMA1, LL_DMA_CHANNEL_1, LL_DMA_CLLR_OFFSET5); LL_USART_EnableDMAReq_RX(USART3); LL_DMA_SetDestAddress(GPDMA1, LL_DMA_CHANNEL_0, LL_USART_DMA_GetRegAddr(USART3, LL_USART_DMA_REG_DATA_TRANSMIT)); LL_USART_EnableDMAReq_TX(USART3); /* USER CODE END USART3_Init 1 */ USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1; USART_InitStruct.BaudRate = 115200; USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; USART_InitStruct.StopBits = LL_USART_STOPBITS_1; USART_InitStruct.Parity = LL_USART_PARITY_NONE; USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; LL_USART_Init(USART3, &USART_InitStruct); LL_USART_SetTXFIFOThreshold(USART3, LL_USART_FIFOTHRESHOLD_1_8); LL_USART_SetRXFIFOThreshold(USART3, LL_USART_FIFOTHRESHOLD_1_8); LL_USART_EnableDEMode(USART3); LL_USART_SetDESignalPolarity(USART3, LL_USART_DE_POLARITY_HIGH); LL_USART_SetDEAssertionTime(USART3, 0); LL_USART_SetDEDeassertionTime(USART3, 0); LL_USART_DisableFIFO(USART3); LL_USART_ConfigAsyncMode(USART3); LL_USART_Enable(USART3); /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } /** * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD); /**/ LL_GPIO_ResetOutputPin(GPIOC, SHR_CLK_Pin|SHR_STR_Pin); /**/ LL_GPIO_ResetOutputPin(SHR_DOUT_DISP_GPIO_Port, SHR_DOUT_DISP_Pin); /**/ LL_GPIO_SetOutputPin(LD2_GPIO_Port, LD2_Pin); /**/ GPIO_InitStruct.Pin = SHR_CLK_Pin|SHR_STR_Pin|LD2_Pin; GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; LL_GPIO_Init(GPIOC, &GPIO_InitStruct); /**/ GPIO_InitStruct.Pin = SHR_DOUT_DISP_Pin; GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; LL_GPIO_Init(SHR_DOUT_DISP_GPIO_Port, &GPIO_InitStruct); /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } /* USER CODE BEGIN 4 */ /* USER CODE END 4 */ /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { } /* USER CODE END Error_Handler_Debug */ } #ifdef USE_FULL_ASSERT /** * @brief Reports the name of the source file and the source line number * where the assert_param error has occurred. * @param file: pointer to the source file name * @param line: assert_param error line source number * @retval None */ void assert_failed(uint8_t *file, uint32_t line) { /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ /* USER CODE END 6 */ } #endif /* USE_FULL_ASSERT */